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AMD Fab 30 Update
Fab 30 Summary

Fab30




Located on a 75-acre campus on the northern edge of Dresden, Germany, Fab 30 is AMD's state-of-the-art European manufacturing facility dedicated to producing high-performance AMD microprocessor products, such as the next-generation AMD Athlon™ processor.

Production of the AMD Athlon is planned to begin at Fab 30 in Q4 1999.




  • Fab 30 will be the first European wafer fabrication facility to use copper interconnect technology in its production process.
  • The copper process technology used in Fab 30 was acquired through AMD's strategic alliance with Motorola's Semiconductor Products Sector. Under this agreement, Motorola has licensed its current copper interconnect technology and High Performance Logic Process (HiPerMOS) to AMD. The companies will collaborate on the development of future logic process technology platforms featuring copper interconnects.
  • AMD announced the Fab 30 project in December 1995, and ground breaking occurred ten months later. Over all, AMD's investment in Dresden totals approximately US$1.9 billion.
  • In addition to Fab 30, AMD Saxony Manufacturing GmbH has established the Dresden Design Center (DDC). The DDC is planned to become a world-class integrated circuit (IC) development center. Its initial projects are in the areas of wired and wireless communications systems. The DDC has the systems and silicon design capability to bring products from concept to market.
  • AMD Saxony Manufacturing GmbH plans to hire approximately 1800 employees. Two hundred of these employees will work in the Dresden Design Center. Currently (August 1, 1999), AMD has approximately 830 German and 30 American employees on board.
    • Fab 30 Project Timeline

      Date Action
    December 1995

    AMD announces its Dresden project

    October 1996

    Ground breaking for facility

    May 1997

    Cornerstone ceremony

    September 1997

    Topping off ceremony

    May 1998

    Clean room ready for equipment

    November 1998

    Start of First Silicon

    December 1998

    First yielding SRAMs

    January 1999

    First yielding AMD-K6® family processors

    Q1 1999

    Begin installation of copper tools

    Q2 99

    Start of first copper lots (AMD-K6 family processors)

    Planned for Q4 99

    Start of AMD Athlon processor production

    • Fab 30 Design/Technical Information

    Architectural design Dr. Alfonso Mercurio ? AMA Group
    Project responsibility Clean room and clean facilities: Meissner + Wurst
    Design partner Achammer Tritthart Partner (ATP)
    Facility Size
    Total project Approximately 866,000 square feet
    SMIF Clean Room
    Size Approximately 90,000 square feet
    Category Class 100T (100 @ 0.3m )
    Wafer Size 200 mm (8 inch)
    Technology Limit Below 0.13m
    Copper Startup Technology 0.18m , 6 level Cu
    Fab Capacity 5,000 8-inch wafers per week at full build out
    Air
    Clean Room Class 100T
    Mini Environment < 0.01 class at 0.1m
    Water < 1 ppb
    Chemical < 1 ppb
    Gases < 1 ppb
    Vibration
    Photo < 200 micro-in/sec.
    Other < 500 micro-in/sec.

     




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