Third-Generation AMD Opteron Processor Key Features 

AMD64 with Direct Connect Architecture

Direct Connect Architecture helps improve system performance and efficiency by directly connecting the processors, the memory controller, and the I/O to the CPU.

• Designed to enable simultaneous 32- and 64-bit computing
• Minimizes the cost of transition and maximizes current investments
• Integrated DDR2 Memory Controller
• Increases application performance by dramatically reducing memory latency
• Scales memory bandwidth and performance to match compute needs
• HyperTransport™ Technology provides up to peak bandwidth per processor-reducing I/O bottlenecks.

Enhanced AMD PowerNow! Technology with Independent Dynamic Core Technology

• Allows processors and cores to operate at various voltages and frequencies, depending on usage and workload to reduce TCO and to lower power consumption in the datacenter
• Enables more granular power management capabilities to reduce processor energy consumption
• Memory controller power consumption can be reduced, by shutting down logic that is not being used, for further reductions in power consumption

Dual Dynamic Power Management™

• Enables more granular power management capabilities to reduce processor energy consumption.
• Separate power planes for cores and memory controller, for optimum power consumption and performance, creating more opportunities for power savings within the cores and memory controller.

AMD CoolCore™ Technology

• Reduces processor energy consumption by turning off unused parts of the processor. For example, the memory controller can turn off the write logic when reading from memory, helping reduce system power.
• Works automatically without the need for drivers or BIOS enablement.
• Power can be switched on or off within a single clock cycle, saving energy with no impact to performance.

AMD Smart Fetch Technology

• Helps reduce power consumption by allowing idle cores to enter a "halt" state, causing them to draw even less power during processing idle times.
• Data from the L1 and L2 cache are transferred to the L3 cache before the idle cores enter a "halt" state. Contents of the idle cores can be intelligently retrieved from the shared L3 cache, so the idle cores can remain "halted."

AMD Virtualization™ (AMD-V™) with Rapid Virtualization Indexing

• Designed to greatly increase performance of virtualized applications by allowing virtual machines to directly manage memory with less hypervisor intervention and associated overhead.
• Improves the efficiency of switching between virtual machines, helping improve performance.
• Effectively isolates virtual machines for secure operation.

Integrated DDR2 DRAM Controller with AMD Memory Optimizer Technology

• 128-bit memory channel can be divided into two independent 64-bit memory channels for improving memory access efficiency
• Larger memory buffers for increased throughput
• Write bursting to minimize read/write transitions for greater throughput
• Optimized DRAM paging algorithm to intelligently predict and retrieve data needed from main memory for greater throughput
• Core prefetchers can pull data directly from L1 cache to decrease latency and to spare L2 bandwidth

AMD Balanced Smart Cache

• Large shared L3 cache shares data between cores efficiently while helping reduce latency to main memory
• Dedicated L1 and L2 cache per core helps performance of virtualized environments and large databases by reducing cache pollution associated with a shared L2 cache
• The L1 cache of AMD Opteron processors can handle double the number of loads per cycle as Second-Generation AMD Opteron processors to help keep CPU cores busy

AMD Wide Floating Point Accelerator

• 128-bit SSE floating-point capabilities enable each processor to simultaneously execute up to four flops per clock per core (up to four times the floating-point computations of previous AMD Opteron processors) for significantly improved performance in compute-intensive and workstation applications
• Instruction fetch bandwidth, data-cache bandwidth, and memory-controller-to-cache bandwidth have all been doubled over previous AMD Opteron processors to help keep the 128-bit floating-point pipeline full