" ISACNTL.ABL
"   PAL Generates SMEMRD#, SMEMWR# From SC520 GPBus
"   For PC/104 (ISA) Bus.  Also inverts 2 signals.
"   Engineer:  David M. Bernstein  
"              M/S: 590  512-602-1889
"   Company:   Advanced Micro Devices
"              6800 Burleson Rd., Austin, TX  78744
"   Date:      08/29/2000
"   Revision:  1.1  6 Sept 2000
"
MODULE isacntl
OPTIONS ''
TITLE 'NetSC520 U7 PAL'
idecntl device 'GAL16LV8';

"Input Signals

GPA20       pin 1;  "GP address bit 20
GPA21       pin 2;  "GP address bit 21
GPA22       pin 3;  "GP address bit 22
GPA23       pin 4;  "GP address bit 23
GPA24       pin 5;  "GP address bit 24
GPA25       pin 6;  "GP address bit 25
!GPMEMRD    pin 7;  "low-active input indicates Memory Read Cycle
!GPMEMWR    pin 8;  "low-active input indicates Memory Write Cycle
GPRESET     pin 9;  "high-active input to reset GPBus
SRESET      pin 11; "low-active input for AMDebug reset

"Output Signals

NC1         pin 12;   "unused output
!SMEMWR     pin 13;   "PC/104 (ISA) signal
!SMEMRD     pin 14;   "PC/104 (ISA) signal
RSTDRV      pin 15;   "inverted version of GPBus reset
PRGRESET    pin 16;   "inverted version of AMDebug reset
NC2         pin 17;   "unused output
NC3         pin 18;   "unused output
NC4         pin 19;   "unused output

Equations

NC1 = 1 ;

NC2 = 1 ;

NC3 = 1 ;

NC4 = 1 ;

SMEMWR = !GPA20 & !GPA21 & !GPA22 & !GPA23 & !GPA24 & !GPA25 & GPMEMWR ;

SMEMRD = !GPA20 & !GPA21 & !GPA22 & !GPA23 & !GPA24 & !GPA25 & GPMEMRD ;

RSTDRV = !GPRESET ;

PRGRESET = !SRESET ;

End