| Q: | What is HyperTransport technology?
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| A: | HyperTransport technology is a high-speed, low latency, point-to-point, packetized link that enables chips to transfer data at peak rates up to 12.8GB/s (102.4 Gigabits per second). It is a scalable architecture that can simplify connectivity by replacing legacy buses and bridges and reducing latencies and bottlenecks within systems. |
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| Q: | Quickly summed up, what are the strengths of HyperTransport technology?
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| A: | HyperTransport technology is designed to provide more bandwidth than current interconnect technologies, use low-latency responses, low pin counts, be compatible with legacy PC buses, be extensible to new SNA (Systems Network Architecture) buses, be compatible with existing and future operating systems and be software compatible with PCI. Its electrical design is designed to improve reliability and reduce board design complexity. |
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| Q: | Is a high-speed bus like HyperTransport technology expensive to implement?
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| A: | No. In addition to flexibility, scalability and very high bandwidth, HyperTransport technology also offers the potential benefit of a very low implementation cost. Because it is part of the roadmap for several high volume desktop PCs and server systems, it will benefit from the economies of scale that come with being a part of the high volume, cost sensitive PC-driven market space. This will be similar to the phenomena experienced as PCI adoption grew beyond the PC market. |
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| Q: | What applications is HyperTransport technology targeted at?
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| A: | HyperTransport technology is designed to enable integrated circuits in computers, servers, embedded systems, networking and telecommunications equipment to exchange information substantially faster than existing bus technologies.
An example is the NVIDIA® nForce™ chipset that utilizes HyperTransport technology to deliver up to a six-fold increase in bandwidth between the nForce Integrated Graphics Processor (IGP) and nForce Media and Communications Processor (MCP). In fact, the bandwidth supplied by HyperTransport allowed NVIDIA to implement full Dolby Digital 5.1 3D audio processing and broadband networking in the MCP, something no other existing technology allowed them to do. |
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| Q: | When will products designed with HyperTransport technology be available?
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| A: | Products based on HyperTransport are available and shipping today. There are more than 4 million pieces of silicon available today. |
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| Q: | What HyperTransport technology based products are available today?
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| A: | The NVIDIA nForce Platform Processing Architecture, comprised of the NVIDIA nForce Integrated Graphics Processor (IGP) and NVIDIA nForce Media and Communications Processor (MPC), are shipping in millions of units as a motherboard chipset supporting the AMD Athlon XP processor and as a console chipset inside the Microsoft Xbox.
HyperTransport technology is also shipping in MIPS based processors including the Broadcom BCM1250 MIPS based processor and the PMC Sierra RM9000X2 MIPS based processor. HyperTransport technology is the primary bus used in the AMD Athlon 64 and AMD Opteron processors and inside its supporting devices including the AMD-8111 HyperTransport I/O hub, the AMD-8131 HyperTransport PCI-X tunnel and the AMD-8151 HyperTransport AGP 3.0 graphics tunnel. SiPackets offers a HyperTransport-to-PCI bridge.
HyperTransport technology is also shipping in the ITS 9000ZX test systems for HyperTransport technology devices from Schlumberger, the FS2240 HyperTransport Analysis Probe from FuturePlus Systems Corporation, FPGA products including the Virtex-II from Xilinx and the Apex II from Altera, a southbridge introduced by ALi, a security processor from Hifn and Cavium Networks, chip testers from Teradyne, RTL modules available from GDA Technologies, PHY modules from Nurlogic and bus functional models for high-speed verification from TransEDA. |
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| Q: | What buses and technologies is HyperTransport technology compatible with?
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| A: | HyperTransport technology is designed to interface with today’s I/O throughput including AGP, PCI, PCI-X, IEEE-1394, USB 2.0, PL-3, SPI-4.2 and Gigabit Ethernet as well as next generation buses including AGP 8x, Infiniband, PCI-X 2.0, PCI Express, SPI-5 and 10 Gigabit Ethernet among others. In traditional architectures, multiple devices share a single bus whereas with HyperTransport, each device receives its own I/O connection, reducing data bottlenecks and boosting performance. This is accomplished through bridge chips and tunnel chips that can be daisy-chained, giving the opportunity to connect multiple HyperTransport input/output devices to a single channel. |
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| Q: | Why is HyperTransport technology compared to PCI technology?
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| A: | PCI technology is more than a connection technology for PC cards and peripherals. The PCI bus is typically used to connect the processor’s memory controller to I/O devices that include PCI slots, hard drives, USB and IEEE-1394 peripherals, printers, etc. In fact, PCI is the most pervasive bus in personal computing and is widely used in networking applications and servers. HyperTransport technology preserves the large investment that has already been made in PCI while paving the way for the future. |
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| Q: | Is HyperTransport technology compatible with existing software and operating systems?
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| A: | Yes, HyperTransport technology is compatible with existing and future operating systems as it is PCI compatible from an Operating System perspective. This has already been shown in production systems based on the NVIDIA nForce chipset. |
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| Q: | Is HyperTransport technology Plug & Play compatible?
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| A: | Yes. HyperTransport I/O devices are designed to use the standard Plug ‘n Play methodology and is boot, run and driver compatible with any standard PCI compliant operating system. |
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