32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only (1.8 V to 2.2 V), Simultaneous Read/Write Page-Mode Boot Sector Flash Memory

General Description
The Am29PDS322D is a 32 Mbit, 1.8 Volt-only flash.. The device is designed to be programmed in system with standard system 1.8V V_CC supply. This device can also be reprogrammed in standard EPROM programmers. The Am29PDS322D offers fast page access time of 40 ns with random access time of 100 ns (at 1.8V to 2.2V V_CC), allowing operation of high-speed microprocessors without wait states. 100 ns random access time operating at V_CC of 1.8V to 2.2V also needs to be developed. This device is offered in a 48-ball FBGA package.

Distinctive Characteristics

Architectural Advantages

• Simultaneous Read/Write operations
• Data can be continuously read from one bank while executing erase/program functions in other bank
• Zero latency between read and write operations
• Page Mode Operation
• 4 word page allows fast asynchronous reads
• Dual Bank architecture
• One 4 Mbit bank and one 28 Mbit bank
• SecSi (Secured Silicon) Sector: Extra 64 Kbyte sector
• Factory locked and identifiable: 16 byte Electronic Serial Number available for factory secure, random ID; verifiable as factory locked through autoselect function. ExpressFlash option allows entire sector to be available for factory-secured data
• Customer lockable: Can be read, programmed, or erased just like other sectors. Once locked, data cannot be changed
• Zero Power Operation
• Sophisticated power management circuits reduce power consumed during inactive periods to nearly zero
• Top or bottom boot block
• Manufactured on 0.23 µm process technology
• Compatible with JEDEC standards
• Pinout and software compatible with single-power-supply flash standard

• 48-ball FBGA

Performance Characteristics

• High performance
• Access time as fast 40 ns (100 ns random access time) at 1.8V to 2.2V V_CC
• Random access time of 100 ns at 1.8V to 2.2V V_CC will be required as customers migrate downward in voltage
• Ultra low power consumption (typical values)
• 2.5 mA active read current at 1 MHz for initial page read
• 24 mA active read current at 10 MHz for initial page read
• 0.5 mA active read current at 10 MHz for intra-page read
• 1 mA active read current at 20 MHz for intra-page read
• 200 nA in standby or automatic sleep mode
• Minimum 1 million write cycles guaranteed per sector
• 20 year data retention at 125°C
• Reliable operation for the life of the system

Software Features

• Data Management Software (DMS)
• AMD-supplied software manages data programming, enabling EEPROM emulation
• Eases historical sector erase flash limitations
• Supports Common Flash Memory Interface (CFI)
• Erase Suspend/Resume
• Suspends erase operations to allow programming in same bank
• Data# Polling and Toggle Bits
• Provides a software method of detecting the status of program or erase cycles
• Unlock Bypass Program command
• Reduces overall programming time when issuing multiple program command sequences

Hardware Features

• Ready/Busy# output (RY/BY#)
• Hardware method for detecting program or erase cycle completion
• Hardware reset pin (RESET#)
• Hardware method of resetting the internal state machine to the read mode
• WP#/ACC input pin
• Write protect (WP#) function allows protection of two outermost boot sectors, regardless of sector protect status
• Acceleration (ACC) function accelerates program timing
• ACC voltage is 8.5 V to 12.5 V
• Sector protection
• Hardware method of locking a sector, either in-system or using programming equipment, to prevent any program or erase operation within that sector
• Temporary Sector Unprotect allows changing data in protected sectors in-system