Technologies
MirrorBit™
Architectures
Standard
Burst/Page
MCP Flash and SRAM
Simultaneous Read/Write
Advanced (Burst/Page+Simult. R/W)
Voltages & Densities
1.8V Devices
3.0V Devices
5.0V Devices
Density Families
General Information
Events & Tradeshows
Flash Memory News
Ordering Part Numbers
Legacy
Spansion
OPN Conversion Tool
Technical Documentation
Success Story
Ask AMD Knowledge Base
Spansion Overview
www.spansion.com
Resources for:
Investors
Job Seekers
Press

3.0V Devices
Am29DL family (Simult. R/W)
DL32x (32Mb, x8/x16)
datasheet
VHDL Verilog Models
IBIS Models

Am29DL322D/323D/324D Product Overview

32 Megabit (4 M x 8-Bit/2 M x 16-Bit),
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

General Description
The Am29DL322D/323D/324D family consists of 32 megabit, 3.0 Volt-only flash memory devices. The device is designed to be programmed in-system with the standard 3.0 Volt VCC supply, and can also be programmed in standard EPROM programmers. The devices are available with an access time of 70, 90 or 120 ns. The devices are offered in 48-pin TSOP and 63-ball FBGA packages.

Distinctive Characteristics

Architectural Advantages Performance Characteristics Software Features Hardware Features


Architectural Advantages

  • Simultaneous Read/Write operations
    • Data can be continuously read from one bank while executing erase/program functions in other bank
    • Zero latency between read and write operations
  • Multiple bank architectures
    • Three devices available with different bank sizes
  • SecSi™ (Secured Silicon) Sector
    • Current version of device has 64 Kbytes; future versions will have 256 bytes
    • Factory locked and identifiable: 16 bytes available for secure, random factory Electronic Serial Number; verifiable as factory locked through autoselect function. ExpressFlash option allows entire sector to be available for factory-secured data
    • Customer lockable: Can be read, programmed, or erased just like other sectors. Once locked, data cannot be changed
  • Zero Power Operation
    • Sophisticated power management circuits reduce power consumed during inactive periods to nearly zero
  • Package options
    • 63-ball FBGA
    • 48-pin TSOP
  • Top or bottom boot block
  • Manufactured on 0.23 µm process technology
  • Compatible with JEDEC standards
    • Pinout and software compatible with single-power-supply flash standard
Return to Top

Performance Characteristics
  • High performance
    • Access time as fast 70 ns
    • Program time: 7 µs/word typical utilizing Accelerate function
  • Ultra low power consumption (typical values)
    • 2 mA active read current at 1 MHz
    • 10 mA active read current at 5 MHz
    • 200 nA in standby or automatic sleep mode
  • Minimum 1 million write cycles guaranteed per sector
  • 20 Year data retention at 125°C
    • Reliable operation for the life of the system
Return to Top

Software Features

Return to Top

Hardware Features
  • Ready/Busy# output (RY/BY#)
    • Hardware method for detecting program or erase cycle completion
  • Hardware reset pin (RESET#)
    • Hardware method of resetting the internal state machine to reading array data
  • WP#/ACC input pin
    • Write protect (WP#) function allows protection of two outermost boot sectors, regardless of sector protect status
    • Acceleration (ACC) function accelerates program timing
  • Sector protection
    • Hardware method of locking a sector, either in-system or using programming equipment, to prevent any program or erase operation within that sector
    • Temporary Sector Unprotect allows changing data in protected sectors in-system
Return to Top




©2009 Advanced Micro Devices, Inc.    |    Contact AMD    |    Careers    |    RSS Feeds    |    Terms and Conditions    |    Privacy    |    Trademark information    |    Site Map