64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and
16 Mbit (1 M x 16-Bit) Pseudo Static RAM
General Description
Am29PDL640G Features
The Am29PDL640G is a 64 Mbit, 3.0 volt-only Page Mode
and Simultaneous Read/Write Flash memory device organized
as 4 Mwords. The device is offered in 73-ball
Fine-pitch BGA packages. The word-wide data (x16) appears
on DQ15-DQ0. This device can be programmed
in-system or in standard EPROM programmers. A 12.0 V
VPP is not required for write or erase operations.
The device offers fast page access times of 25, 30, and 45
ns, with corresponding random access times of 65, 70, 85,
and 90 ns, respectively, allowing high speed microprocessors
to operate without wait states. To eliminate bus contention
the device has separate chip enable (CE#), write enable
(WE#) and output enable (OE#) controls.
Data can be continuously read from one bank while executing erase/program
functions in another bank.
Zero latency between read and write operations
Flexible Bank™ architecture
Four banks may be grouped by customer to achieve desired bank divisions.
Bank A: 8 Mbit (4 Kw x 8 and 32Kw x 15)
Bank B: 24 Mbit (32 Kw x 48)
Bank C: 24 Mbit (32 Kw x 48)
Bank D: 8 Mbit (4 Kw x 8 and 32 Kw x 15)
Manufactured on 0.17 µm process technology
SecSi™ (Secured Silicon) Sector: Extra 256 Byte
sector
Factory locked and identifiable: 16 bytes available for
secure, random factory Electronic Serial Number; verifiable
as factory locked through autoselect function. ExpressFlash
option allows entire sector to be available for
factory-secured data
Customer lockable: Sector is one-time programmable. Once sector is
locked, data cannot be changed.
Zero Power Operation
Sophisticated power management circuits reduce power consumed during
inactive periods to nearly zero.
Boot Sectors
Top and bottom boot sectors in the same device
Compatible with JEDEC standards
Pinout and software compatible with single-power-supply flash standard
Hardware method for detecting program or erase cycle completion
Hardware reset pin (RESET#)
Hardware method of resetting the internal state machine to the read
mode
WP#/ACC input pin
Write protect (WP#) function protects sectors 0, 1, 140, and 141,
regardless of sector protect status
Acceleration (ACC) function accelerates program timing
Persistent Sector protection
A command sector protection method to lock combinations of individual
sectors and sector groups to prevent program or erase operations within
that sector
Sectors can be locked and unlocked in-system at VCC level
Password Sector Protection
A sophisticated sector protection method to lock
combinations of individual sectors and sector groups to
prevent program or erase operations within that sector using
a user-defined 64-bit password