General Description

The Am29DL640H is a 64 megabit, 3.0 volt-only flash memory device, organized as 4,194,304 words of 16 bits each or 8,388,608 bytes of 8 bits each. Word mode data appears on DQ15–DQ0; byte mode data appears on DQ7–DQ0. The device is designed to be programmed in-system with the standard 3.0 volt VCC supply, and can also be programmed in standard EPROM programmers.

The device is available with an access time of 55, 70 or 85 ns and is offered in a 73-ball FBGA package. Standard control pins—chip enable (CE#f), write enable (WE#), and output enable (OE#)—control normal read and write operations, and avoid bus contention issues.

The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations.

Distinctive Characteristics

MCP Features

• Power supply voltage of 2.7 to 3.3 volt
• High performance
  • Access time as fast as 55 ns
• Package
  • 73-Ball FBGA
• Operating Temperature
  • 40°C to + 85°C

Flash Memory Features

Architectural Advantages

• Simultaneous Read/Write operations
• Data can be continuously read from one bank while executing erase/program functions in another bank.
• Zero latency between read and write operations
• Flexible Bank architecture
• Read may occur in any of the three banks not being written or erased.
• Four banks may be grouped by customer to achieve desired bank divisions.
• Manufactured on 0.13 µm process technology
• SecSi™ (Secured Silicon) Sector: Extra 256 Byte sector
• Factory locked and identifiable: 16 bytes available for secure, random factory Electronic Serial Number; verifiable as factory locked through autoselect function. ExpressFlash option allows entire sector to be available for factory-secured data
• Customer lockable: Sector is one-time programmable. Once sector is locked, data cannot be changed.
• Zero Power Operation
• Sophisticated power management circuits reduce power consumed during inactive periods to nearly zero.
• Boot sectors
  • Top and bottom boot sectors in the same device
• Compatible with JEDEC standards
  • Pinout and software compatible with singe-power-supply flash standard

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Performance Characteristics

• High performance
• Access time as fast 55 ns
• Program time: 4µs/word typical utilizing Accelerate function
• Ultra low power consumption (typical values)
• 2 mA active read current at 1 MHz
• 10 mA active read current at 5 MHz
• 200 nA in automatic sleep mode
• Minimum 1 million write cycles guaranteed per sector
• 20 Year data retention at 125°C
• Reliable operation for the life of the system

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Software Features

• Data Management Software (DMS)
• AMD-supplied software manages data programming, enabling EEPROM emulation
• Eases historical sector erase flash limitations
• Supports Common Flash Memory Interface (CFI)
• Program/Erase Suspend/Erase Resume
  • Suspends program/erase operations to allow programming/erasing in same bank
• Data# Polling and Toggle Bits
  • Provides a software method of detecting the status of program or erase cycles
• Unlock Bypass Program command
  • Reduces overall programming time when issuing multiple program command sequences

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Hardware Features

• Any combination of sectors can be erased
• Ready/Busy# output (RY/BY#)
• Hardware method for detecting program or erase cycle completion
• Hardware reset pin (RESET#)
  • Hardware method of resetting the internal state machine to the read mode
• WP#/ACC input pin
  • Write protect (WP#) function protects sectors 0, 1, 140, and 141, regardless of sector protect status
  • Acceleration (ACC) function accelerates program timing
• Sector protection
  • Hardware method of locking a sector, either in-system or using programming equipment, to prevent any program or erase operation within that sector
  • Temporary Sector Unprotect allows changing data in protected sectors in-system

pSRAM Features

• Power dissipation
  • Operating: 40 mA maximum
  • Standby: 70 µA maximum
  • Deep pwer-down standby: 5 µA
• CE1ps# and CE2ps Chip Select
• Power down features using CE1s# and CE2s
• Data retention supply voltage: 2.7 to 3.3 volt
• Byte data control: LB#s (DQ7–DQ0), UB#s (DQ15–DQ8)
• 8-word page mode access