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Am29LV6402M Product Overview
128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit™ 3.0 Volt-only,
Uniform Sector Flash Memory with Versatile I/0™ Control
General Description
The Am29LV6402M consists of two 64 Mbit, 3.0 volt single power supply flash
memory devices and is organized as 4,194,304 doublewords or 8,388,608 words.
The device has a 32-bit wide data bus that can also function as an 16-bit
wide data bus by using the WORD# input. The device can be programmed either
in the host system or in standard EPROM programmers. An access time of 100
or 110 ns is available. Note that each access time has a specific operating
voltage range (VCC) as specified in the Product Selector Guide and the Ordering
Information sections. The device is offered in an 80-ball Fortified BGA
package. Each device has separate chip enable (CE#), write enable (WE#)
and output enable (OE#) controls. Each device requires only a single 3.0
volt power supply for both read and write functions. In addition to a VCC
input, a high-voltage accelerated program (WP#/ACC) input provides shorter
programming times through increased current. This feature is intended to
facilitate factory throughput during system production, but may also be
used in the field if desired. The device is entirely command set compatible
with the JEDEC single-power-supply Flash standard. Commands are written
to the device using standard microprocessor write timing. Write cycles also
internally latch addresses and data needed for the programming and erase
operations.
The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully erased when shipped from the factory.
Device programming and erasure are initiated through command sequences. Once a program or erase operation
has begun, the host system need only poll the DQ7 and DQ15 (Data# Polling) or DQ6 and DQ14
(toggle) status bits or monitor the Ready/Busy# (RY/BY#) outputs to determine whether the operation
is complete. To facilitate programming, an Unlock Bypass mode reduces command sequence overhead by
requiring only two write cycles to program data instead of four.
The VersatileI/O™ (VIO) control allows the host system to set the voltage levels that the device generates
Distinctive Characteristics
Architectural Advantages
- Single power supply operation
- 3 volt read, erase, and program operations
- VersatileI/O™ control
- Device generates data output voltages and tolerates data input
voltages on the CE# and DQ inputs/outputs as determined by the voltage
on the V10 pin; operates from 1.65 to 3.6V
- Manufactured on 0.23 µm MirrorBit™ process technology
- SecSi™ (Secured Silicon) Sector region
- 128-doubleword/256-word sector for permanent, secure identification
through an 8-doubleword/16-word random Electronic Serial Number,
accessible through a command sequence
- May be programmed and locked at the factory or by the customer
- Flexible sector architecture
- One hundred twenty-eight 32 Kdoubleword (64 Kword) sectors
- Compatibility with JEDEC standards
- Provides pinout and software compatibility for single-power supply Flash, and superior inadvertent write protection
- 100,000 erase cycles per sector
- 20-year data retention at 125°C
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Performance Characteristics
- High performance
- 100 ns access time
- 30 ns page read times
- 0.5 s typical sector erase time
- 22 µs typical write buffer doubleword programming time: 16-doubleword/32-word
write buffer reduces overall programming time for multiple-word
updates
- 4-doubleword/8-word page read buffer
- 16-doubleword/32-word write buffer
- Low power consumption (typical values at 3.0 V, 5 MHz
- 26 mA typical active read current
- 100 mA typical erase/program current
- 2 µA typical standby mode current
- Package Options
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Software Features
- Program Suspend & Resume: read other sectors before programming operation is completed
- Erase Suspend & Resume: read/program other sectors before an erase operation is completed
- Data# polling & toggle bits provide status
- Unlock Bypass Program command reduces overall multiple-word or byte programming time
- CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices
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Hardware Features
- Sector Group Protection: hardware-level method of preventing write operations within a sector group
- Temporary Sector Unprotect: VID -level method of changing code in locked sectors
- WP#/ACC input accelerates programming time (when high voltage is applied) for greater throughput during system production. Protects first or last sector regardless of sector protection settings
- Hardware reset input (RESET#) resets device
- Ready/Busy# output (RY/BY#) detects program or erase cycle completion
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