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S29JL032H Product Overview
32 Megabit (4 M x 8 Bit/2 M x 16 Bit)
CMOS 3.0 Volt only, Simultaneous Read/Write
Flash Memory
General Description
The S29JL032H is a 32 megabit, 3.0 volt-only flash memory device, organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. Word mode data appears on DQ15–DQ0; byte mode data appears on DQ7–DQ0. The device is designed to be programmed in-system with the standard 3.0 volt VCC supply, and can also be programmed in standard EPROM programmers.
Distinctive Characteristics
Architectural Advantages
- Simultaneous Read/Write operations
- Data can be continuously read from one bank while executing erase/program
functions in another bank.
- Zero latency between read and write operations
- Multiple Bank architecture
- Four bank architectures available.
- Boot Sectors
- Top and bottom boot sectors in the same device
- Any combination of sectors can be erased
- Manufactured on 0.13 µm process technology
- SecSi™ (Secured Silicon) Sector: Extra 256 Byte sector
- Factory locked and identifiable: 16 bytes available for secure,
random factory Electronic Serial Number; verifiable as factory locked
through autoselect function.
- Customer lockable: One-time programmable only. Once locked, data
cannot be changed
- Zero Power Operation
- Sophisticated power management circuits reduce power consumed
during inactive periods to nearly zero.
- Compatible with JEDEC standards
- Pinout and software compatible with single-power-supply flash
standard
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Package options
Performance Characteristics
- High performance
- Access time as fast as 55 ns
- Program time: 4 µs/word typical using accelerated programming
function
- Ultra low power consumption (typical values)
- 2 mA active read current at 1 MHz
- 10 mA active read current at 5 MHz
- 200 nA in standby or automatic sleep mode
- Cycling Endurance: 1 million cycles per sector typical
- Data Retention: 20 years typical
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Software Features
- Supports Common Flash Memory Interface (CFI)
- Erase Suspend/Erase Resume
- Suspends erase operations to read data from, or program data to,
a sector that is not being erased, then resumes the erase operation.
- Data# Polling and Toggle Bits
- Provides a software method of detecting the status of program
or erase cycles
- Unlock Bypass Program command
- Reduces overall programming time when issuing multiple program
command sequences
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Hardware Features
- Ready/Busy# output (RY/BY#)
- Hardware method for detecting program or erase cycle completion
- Hardware reset pin (RESET#)
- Hardware method of resetting the internal state machine to the
read mode
- WP#/ACC input pin
- Write protect (WP#) function protects the two outermost boot sectors regardless of sector protect status
- Acceleration (ACC) function accelerates program timing
- Sector protection
- Hardware method to prevent any program or erase operation within
a sector
- Temporary Sector Unprotect allows changing data in protected
sectors in-system
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