64 Megabit (4 M x 16-Bit)
CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory

General Description
The Am29BDS640G is a 64 Mbit, 1.8 Volt-only, simultaneous Read/Write, Burst Mode Flash memory device, organized as 4,194,304 words of 16 bits each. This device uses a single VCC of 1.65 to 1.95 V to read, program, and erase the memory array. The device supports Enhanced VIO to offer up to 3V compatible inputs and outputs. A 12.0-volt VID may be used for faster program performance if desired. The device can also be programmed in standard EPROM programmers. At 54 MHz, the device provides a burst access of 13.5 ns at 30 pF with a latency of 87.5 ns at 30 pF. At 40 MHz, the device provides a burst access of 20 ns at 30 pF with a latency of 95 ns at 30 pF. The device operates within the industrial temperature range of -40°C to +85°C. The device is offered in the 80-ball FBGA package.

Distinctive Characteristics

Architectural Advantages

• Single 1.8 Volt read, program and erase (1.65 to 1.95 volt)
• Manufactured on 0.17 µm process technology
• Enhanced VersatileIO™ (V_IO) Feature
• Device generates data output voltages and tolerates data input voltages as determined by the voltage on the V_IO pin
• 1.8V and 3V compatible I/O signals
• Simultaneous Read/Write operations
• Data can be continuously read from one bank while executing erase/program functions in other bank
• Zero latency between read and write operations
• Four bank architecture: 16Mb/16Mb/16Mb/16Mb
• Programmable Burst Interface
• 2 Modes of Burst Read Operation
• Linear Burst: 8, 16, and 32 words with wrap-around
• Continuous Sequential Burst
• Sector Architecture
• Eight 8 Kword sectors and one hundred twenty-six 32 Kword sectors
• Banks A and D each contain four 8 Kword sectors and thirty-one 32 Kword sectors; Banks B and C each contain thirty-two 32 Kword sectors
• Eight 8 Kword boot sectors, four at the top of the address range, and four at the bottom of the address range
• Minimum 1 million erase cycle guarantee per sector
• 20-year data retention at 125°C
• Reliable operation for the life of the system
• 80-ball FBGA package

Performance Characteristics

• Read access times at 54/40 MHz
• Burst access times of 13.5/20 ns @ 30 pF at industrial temperature range
• Asynchronous random access times of 70 ns (at 30 pF)
• Synchronous latency of 87.5/95 ns with 1.8 V V_IO, and 88.0/95 ns with 3.0 V V_IO (at 30 pF)
• Power dissipation (typical values, C_L = 30 pF)
• Burst Mode Read: 10 mA
• Simultaneous Operation: 25 mA
• Program/Erase: 15 mA
• Standby mode: 0.2 µA

Hardware Features

• Sector Protection
• Software command sector locking
• Handshaking feature available
• Provides host system with minimum possible latency by monitoring RDY
• Hardware reset input (RESET#)
• Hardware method to reset the device for reading array data
• WP# input
• Write protect (WP#) function protects sectors 0 and 1 (bottom boot), or sectors 132 and 133 (top boot), regardless of sector protect status
• ACC input: Acceleration function reduces programming time; all sectors locked when ACC = V_IL
• CMOS compatible inputs, CMOS compatible outputs
• Low VCC write inhibit

Software Features

• Supports Common Flash Memory Interface (CFI)
• Software command set compatible with JEDEC 42.4 standards
• Backwards compatible with Am29F and Am29LV families
• Data# Polling and Toggle Bits
• Provides a software method of detecting program and erase operation completion
• Erase Suspend/Resume
• Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation
• Unlock Bypass Program command
• Reduces overall programming time when issuing multiple program command sequences