64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation,
Burst Mode Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM

General Description
The Am42BDS640AG combines a 1.8V, 64 Mbit Am29BDS640G Flash memory device and a 16 Mbit static RAM in an 93-ball FBGA package.

The Am29BDS640AG is a simultaneous Read/Write, Burst Mode Flash memory device that uses a single VCC of 1.65 to 1.95 V to read, program, and erase the memory array. At 54 MHz, the device provides a burst access of 13.5 ns at 30 pF with a latency of 87.5 ns at 30 pF. At 40 MHz, the device provides a burst access of 20 ns at 30 pF with a latency of 95 ns at 30 pF. The device operates within the industrial temperature range of -40°C to +85°C.

Distinctive Characteristics

MCP Features

• Power supply voltage of 1.65 to 1.95 volt
• High performance
• Access time as fast as 70 ns
• Package
• 93-Ball FBGA
• Operating Temperature
• -40°C to +85°C

Flash Memory Features

Architectural Advantages

• Single 1.8 Volt read, program and erase (1.65 to 1.95 volt)
• Manufactured on 0.17 µm process technology
• Simultaneous Read/Write operations
• Data can be continuously read from one bank while executing erase/program functions in other bank
• Zero latency between read and write operations
• Four bank architecture: 16Mb/16Mb/16Mb/16Mb
• Programmable Burst Interface
• 2 Modes of Burst Read Operation
• Linear Burst: 8, 16, and 32 words with wrap-around
• Continuous Sequential Burst
• Sector Architecture
• Eight 8 Kword sectors and one hundred twenty-six 32 Kword sectors
• Banks A and D each contain four 8 Kword sectors and thirty-one 32 Kword sectors; Banks B and C each contain thirty-two 32 Kword sectors
• Eight 8 Kword boot sectors, four at the top of the address range, and four at the bottom of the address range
• Minimum 1 million erase cycle guarantee per sector
• 20-year data retention at 125°C

Performance Characteristics

• Read access times at 54/40 MHz
• Burst access times of 13.5/20 ns @ 30 pF at industrial temperature range
• Asynchronous random access times of 70 ns (at 30 pF)
• Synchronous latency of 87.5/95 ns
• Power dissipation (typical values, C_L = 30 pF)
• Burst Mode Read: 10 mA
• Simultaneous Operation: 25 mA
• Program/Erase: 15 mA
• Standby mode: 0.2 µA

Hardware Features

• Software command sector locking
• Handshaking: host monitors operations via RDY output
• Hardware reset input (RESET#)
• WP# input
• Write protect (WP#) function protects sectors 0, 1 (bottom boot) or sectors 132 and 133 (top boot), regardless of sector protect status
• ACC input: Acceleration function reduces programming time; all sectors locked when ACC = V_IL
• CMOS compatible inputs, CMOS compatible outputs
• Low V_CC write inhibit

Software Features

• Supports Common Flash Memory Interface (CFI)
• Software command set compatible with JEDEC 42.4 standards
• Data# Polling and Toggle Bits
• Erase Suspend/Resume
• Suspends or resumes an erase operation in one sector to read data from, or program data to, other sectors
• Unlock Bypass Program command
• Reduces overall programming time when issuing multiple program command sequences

SRAM Features

• Power dissipation
• Operating: 3 mA maximum
• Standby: 15 µA maximum
• CE1s# and CE2s Chip Select
• Power down features using CE1s# and CE2s
• Data retention supply voltage: 1.0 to 2.2 volt
• Byte data control: LB#s (DQ7–DQ0), UB#s (DQ15–DQ8)