The Am29LV640MH/L is a 64 Mbit, 3.0 volt single power supply flash memory device organized as 4,194,304 words. The device has an 16-bit bus and can be programmed either in the host system or in standard EPROM programmers.

Each device requires only a single 3.0 volt power supply for both read and write functions. In addition to a VCC input, a high-voltage accelerated program (ACC) feature provides shorter programming times through increased current on the WP#/ACC input. This feature is intended to facilitate factory throughput during system production, but may also be used in the field if desired.

The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the programming and erase operations.

• Power supply voltage of 2.7 to 3.3 volt
• High Performance
  • Access time as fast as 100ns initial, 35 ns page. pSRAM access times as fast as 55 ns.
• Package
  • 69-Ball FBGA
  • Look ahead pinout for simple migration
  • 8 x 10 x 1.2 mm
• Operating Temperature
• –40°C to +85°C

Flash Memory Features

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Architectural Advantages

• Single power supply operation
  • 3 V for read, erase, and program operations
• Manufactured on 0.23 µm MirrorBit process technology
• SecSi™(Secured Silicon) Sector region
  • 128-word sector for permanent, secure identification through an 8-word random Electronic Serial Number, accessible through a command sequence
  • May be programmed and locked at the factory or by the customer
• Flexible sector architecture
  • One hundred twenty seven 32 Kword sectors
  • Eight 4 Kword boot sectors
• Compatibility with JEDEC standards
  • Provides pinout and software compatibility for single-power supply flash, and superior inadvertent write protection
• Minimum 100,000 erase cycle guarantee per sector
• 20-year data retention at 125°C

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• High performance
  • 100 ns access time
  • 35 ns page read times
  • 0.5 s typical sector erase time
  • 22 µs typical write buffer word programming time: 16-word write buffer reduces overall programming time for multiple-word updates
  • 4-word page read buffer
  • 16-word write buffer
• Low power consumption (typical values at 3.0 V, 5 MHz)
  • 30 mA typical initial Page read current; 10 mA typical intra-Page read current
  • 50 mA typical erase/program current
  • 1 µA typical standby mode current

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• Software features
  • Program Suspend & Resume: read other sectors before programming operation is completed
  • Erase Suspend & Resume: read/program other sectors before an erase operation is completed
  • Data# polling & toggle bits provide status
  • Unlock Bypass Program command reduces overall multiple-word programming time
  • CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices
• Hardware features
  • Sector Group Protection: hardware-level method of preventing write operations within a sector group
  • Temporary Sector Unprotect: VID-level method of changing code in locked sectors
  • WP#/ACC input:
    Write Protect input (WP#) protects top or bottom two sectors regardless of sector protection settings ACC (high voltage) accelerates programming time for higher throughput during system production
  • Hardware reset input (RESET#) resets device

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• As fast as 55ns access time
• Power dissipation
  • Operating: 23 mA maximum
  • Standby: 60 µA maximum at 3.0 V
• CE1ps# and CE2ps Chip Select
• Power down features using CE1ps# and CE2ps
• Data retention supply voltage: 1.5 to 3.3 volt
• Byte data control: LB#s (DQ7–DQ0), UB#s (DQ15–DQ8)

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