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Am49DL32xBG Product Overview
Stacked Multi-Chip
Package (MCP) Flash Memory and SRAM
Am29DL32xG 32 Megabit (4 M x 8-Bit/2 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M
x 16-Bit) Pseudo Static RAM with Page Mode
General Description
Am29DL32xG Features
The Am29DL322G/323G/324G consists of 32 megabit, 3.0 volt-only flash memory
devices, organized as 2,097,152 words of 16 bits each or 4,194,304 bytes
of 8 bits each. Word mode data appears on DQ15-DQ0; byte mode data appears
on DQ7-DQ0. The device is designed to be programmed in-system with the
standard 3.0 volt VCC supply, and can also be programmed in standard EPROM
programmers.
Distinctive Characteristics
MCP Features
- Power supply voltage of 2.7 to 3.3 volt
- High performance
- Access time as fast as 70 ns
- Package
- Operation Temperature
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Flash Memory Features
Architectural Advantages
- Simultaneous Read/Write operations
- Data can be continuously read from one bank while executing erase/program
functions in other bank
- Zero latency between read and write operations
- Secured Silicon (SecSi) Sector: Extra 256 Byte sector
- Factory locked and identifiable: 16 bytes available for secure,
random factory Electronic Serial Number; verifiable as factory locked
through autoselect function.
- Customer lockable: Sector is one-time programmable. Once locked,
data cannot be changed
- Zero Power Operation
- Sophisticated power management circuits reduce power consumed
during inactive periods to nearly zero
- Top or bottom boot block
- Manufactured on 0.17 µm process technology
- Compatible with JEDEC standards
- Pinout and software compatible with single-power-supply flash
standard
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Performance Characteristics
- High performance
- Access time as fast as 70 ns
- Program time: 4 µs/word typical utilizing Accelerate function
- Ultra low power consumption (typical values)
- 2 mA active read current at 1 MHz
- 10 mA active read current at 5 MHz
- 200 nA in standby or automatic sleep mode
- Minimum 1 million write cycles guaranteed per sector
- 20 Year data retention at 125°C
- Reliable operation for the life of the system
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Software Features
- Data Management Software (DMS)
- AMD-supplied software manages data programming and erasing, enabling
EEPROM emulation
- Eases sector erase limitations
- Supports Common Flash Memory Interface (CFI)
- Erase Suspend/Erase Resume
- Suspends erase operations to allow programming in the same bank
- Data# Polling and Toggle Bits
- Provides a software method of detecting the status of program or
erase cycles
- Unlock Bypass Program command
- Reduces overall programming time when issuing multiple program command
sequences
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Hardware Features
- Any combination of sectors can be erased
- Ready/Busy# output (RY/BY#)
- Hardware method for detecting program or erase cycle completion
- Hardware reset pin (RESET#)
- Hardware method of resetting the internal state machine to reading
array data
- WP#/ACC input pin
- Write protect (WP#) function allows protection of two outermost
boot sectors, regardless of sector protect status
- Acceleration (ACC) function accelerates program timing
- Sector protection
- Hardware method of locking a sector, either in-system or using programming
equipment, to prevent any program or erase operation within that sector
- Temporary Sector Unprotect allows changing data in protected sectors
in-system
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pSRAM Features
- Power dissipation
- Operating: 40 mA maximum
- Standby: 70 µA maximum
- Deep power-down standby: 5 µA
- CE1s# and CE2s Chip Select
- Power down features using CE1s# and CE2s
- Data retention supply voltage: 2.7 to 3.3 volt
- Byte data control: LB#s (DQ7-DQ0), UB#s (DQ15-DQ8)
- 8-word page mode access
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