64 Megabit (4 M x 16-Bit)
CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory

General Description
The Am29BDS643G is a 64 Mbit, 1.8 Volt-only, simultaneous Read/Write, Burst Mode Flash memory device, organized as 4,194,304 words of 16 bits each. This device uses a single VCC of 1.7 to 1.9 V to read, program, and erase the memory array. A 12.0-volt VPP may be used for faster program performance if desired. The device can also be programmed in standard EPROM programmers. The device is offered in versions that operate at 66, 54, and 40 MHz. At those frequencies, the Am29BDS643G provides burst access times of 11, 13.5 and 20 ns, respectively; the initial access times are 71, 87.5, and 95 ns, respectively. All speeds assume a load of 30 pF. The device operates within the industrial temperature range of -40°C to +85°C, and is offered in the 44-ball Very Thin FBGA package.

Distinctive Characteristics

• Single 1.8 volt read, program and erase (1.7 to 1.9 volt)
  
• Multiplexed Data and Address for reduced I/O count
  
  • A0-A15 multiplexed as D0-D15
    
  • Addresses are latched by AVD# control input when CE# low
    
• Simultaneous Read/Write operation
  
  • Data can be continuously read from one bank while executing erase/program functions in other bank
    
  • Zero latency between read and write operations
    
• Read access times at 66/54/40 MHz
  
  • Burst access times of 11/13.5/20 ns @ 30 pF at industrial temperature range
    
  • Asynchronous random access times of 55/70/70 ns @ 30 pF
    
  • Synchronous random access times of 71/87.5/95 ns @ 30 pF
    
• Burst length
  
  • Continuous linear burst
    
  • 8/16/32 word linear burst with wrap around
    
• Power dissipation (typical values, 8 bits switching, CL = 30 pF)
  
  • Burst Mode Read: 25 mA
    
  • Simultaneous Operation: 40 mA
    
  • Program/Erase: 15 mA
    
  • Standby mode: 0.2 µA
    
• Sector Architecture
  
  • Eight 8 Kword sectors and one hundred twenty-six 32 Kword sectors
    
  • Banks A and B each contain four 8 Kword sectors and thirty-one 32 Kword sectors; Banks C and D each contain thirty-two 32 Kword sectors
    
• Sector Protection
  
  • Software command sector locking
    
  • WP# protects the last two boot sectors
    
  • All sectors locked when VPP = VIL
    
• Handshaking feature
  
  • Provides host system with minimum possible latency by monitoring RDY
    
• Supports Common Flash Memory Interface (CFI)
  
• Software command set compatible with JEDEC 42.4 standards
  
  • Backwards compatible with Am29F and Am29LV families
    
• Manufactured on 0.17 µm process technology
  
• Minimum 1 million erase cycle guarantee per sector
  
• 20-year data retention at 125°C
  
  • Reliable operation for the life of the system
    
• Embedded Algorithms
  
  • Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors
    
  • Embedded Program algorithm automatically writes and verifies data at specified addresses
    
• Data# Polling and toggle bits
  
  • Provides a software method of detecting program and erase operation completion
    
• Erase Suspend/Resume
  
  • Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation
    
• Hardware reset input (RESET#)
  
  • Hardware method to reset the device for reading array data
    
• CMOS compatible inputs and outputs
  
• Package
  
  • 44-ball Very Thin FBGA