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AMD Announces 8MBIT Simultaneous Read/Write Flash Memory

New Features for Free

SUNNYVALE, CA -- May 19, 1997 --AMD today unveiled the first device in a family that incorporates its new simultaneous read/write flash architecture. The highly integrated Am29DL800 allows read operations to occur during program and erase operations. There is no price premium over the standard 2.7-volt-only 8 Mbit product. System-level costs are reduced because there is no need for EEPROM devices, less SRAM is required and the device does not require an additional real-time operating system. In addition, there are no system or device latencies.

"AMD's unique simultaneous read/write flash memory offers substantial cost savings and reduces system complexity," said Walid Maghribi, group vice president of AMD's Memory Group.

Previously, designers were forced to use multiple non-volatile memory components to store system configuration and parameter data, as well as user-specific information. Separate memory devices were required to run the flash program and erase algorithms.

"By working closely with our customers, we are able to offer them what they need to improve their systems," said Maghribi.

Applications
The Am29DL800 addresses a wide array of embedded applications that today incorporate individual flash, EEPROM and SRAM devices. Target applications include digital cellular phones, pagers, web browsers and set-top boxes, personal information devices, and global positioning systems.

Am29DL800 Overview

  • Simultaneous Read/Write Flash Architecture AMD's simultaneous read/write flash device provides a highly integrated hardware solution that provides simultaneous read and write functionality. There is no system or device latency between read and write operations. Latency is not acceptable in real-time, embedded systems.
  • Reduces System-level Cost Structure The Am29DL800 reduces the system-level cost structure by eliminating the need for additional memory devices. Reduced component count reduces board, logistics and carrying costs, increases manufacturing yields, and enables smaller form-factor systems. In addition, AMD's hardware-only solution does not increase system-level cost by adding an additional SRAM as required by some pseudo read-while-write implementations.
  • Zero-Power Operation Advanced power management features, such as low-power standby mode and automatic sleep mode, allow low power consumption while maintaining high system-level performance. During normal operation, most portable systems have many inactive periods. AMD's unique power management system automatically puts the device into sleep mode during these inactive periods, consuming virtually zero power. The device will "wake-up" with standard read access timing when it detects bus activity.
  • Easy Upgrade in Existing Designs Hardware and software compatibility with the Am29LV800 allows easy upgrades in existing systems.
  • Single Power Supply for Read and Write Operations The Am29DL800 is a 2.7 volt-only device. Single power-supply operation reduces system costs, power consumption and reliability issues associated with DC-to-DC converters required for dual-voltage flash devices.
  • High Performance The read access time of the Am29DL800 is as fast as 90 nanoseconds, allowing operation of high-speed microprocessors with zero wait states.

Price, Package & Availability
Samples are available now. Volume shipments of the Am29DL800 will begin this quarter. The device will initially ship in a 48-pin TSOP package and later be offered in a 48-ball mBGA™ package. The Am29DL800-120EC in a 48-pin TSOP package is priced at $9.05 when ordered in quantities of 10,000.


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