| Series |
1000 Series
| 2000 Series
| 8000 Series
|
| Scalability |
1-way |
Up to 2-way |
Up to 8-way |
| Socket |
Socket AM2 |
Socket F (1207) |
Socket F (1207) |
| Performance-Optimized SE Models |
|
| Wattage |
|
105W |
105W |
| Frequency |
Model Numbers |
| 2.5GHz |
- |
Model 2360 SE* |
Model 8360 SE* |
| 2.4GHz |
- |
Model 2358 SE* |
Model 8358 SE* |
| Standard Power Models |
|
| Wattage |
75W |
75W |
75W |
| Frequency |
Model Numbers |
| Quad-Core 2.0GHz |
- |
Model 2350 |
Model 8350 |
| Quad-Core 2.1GHz |
Model 1352* |
Model 2352 |
- |
| Quad-Core 2.2GHz |
Model 1354* |
Model 2354 |
Model 8354 |
| Quad-Core 2.3GHz |
Model 1356* |
Model 2356 |
Model 8356 |
| Low-Power Models HE |
|
| Wattage |
|
55W |
55W |
| HE Frequency |
Model Numbers |
| Quad-Core 1.7GHz |
- |
Model 2344 HE* |
- |
| Quad-Core 1.8GHz |
- |
Model 2346 HE* |
Model 8346 HE* |
| Quad-Core 1.9GHz |
- |
Model 2347 HE* |
Model 8347 HE* |
| Direct Connect Architecture |
Yes |
Yes |
Yes |
| AMD Virtualization™ (AMD-V™) |
Yes |
Yes |
Yes |
| Rapid Virtualization Indexing |
Yes |
Yes |
Yes |
| Tagged TLB support |
Yes |
Yes |
Yes |
| Device Exclusion Vector (DEV) |
Yes |
Yes |
Yes |
| AMD PowerNow!™ technology |
Yes |
Yes |
Yes |
| Independent Dynamic Core Technology |
Yes |
Yes |
Yes |
| Supported power states |
Up to 5 |
Up to 5 |
Up to 5 |
| CoolCore™ Technology |
Yes |
Yes |
Yes |
| Dual Dynamic Power Management (DDPM) |
Supported |
Supported |
Supported |
| Integrated DDR2 memory controller |
Yes |
Yes |
Yes |
| AMD Memory Optimizer Technology |
Yes |
Yes |
Yes |
| DDR2 Memory type supported |
Unbuffered |
Registered |
Registered |
| DDR2 Memory controller width |
128-bit |
128-bit |
128-bit |
| DDR2 Memory Max Frequency |
DDR2-800 |
DDR2-667 |
DDR2-667 |
| DDR2 Memory Max DIMM support/CPU |
4 @ DDR2-800 |
8 @ DDR2-533 |
8 @ DDR2-533 |
| On-Line spare RAS support |
Yes |
Yes |
Yes |
| ECC DRAM protection |
Yes |
Yes |
Yes |
| Advanced ECC protection |
Yes |
Yes |
Yes |
| HyperTransport™ technology |
Yes |
Yes |
Yes |
| HyperTransport technology links (total/coherent) |
1/0 |
3/1 |
3/3 |
| HyperTransport technology link width |
16 bits x 16 bits |
16 bits x 16 bits |
16 bits x 16 bits |
| HyperTransport bus frequency |
Up to 2GHz |
1GHz |
1GHz |
| AMD64 |
Yes |
Yes |
Yes |
| Simultaneous 32 & 64-bit computing |
Yes |
Yes |
Yes |
| L1 Cache Size (data/instruction) |
64KB/64KB |
64KB/64KB |
64KB/64KB |
| L1 Cache associativity (data/instruction) |
2-way/2-way |
2-way/2-way |
2-way/2-way |
| L2 Cache Size (dedicated cache per core) |
512KB |
512KB |
512KB |
| L2 Cache associativity (data/instruction) |
8-way/8-way |
8-way/8-way |
8-way/8-way |
| L3 Cache Size (shared cache) |
2MB |
2MB |
2MB |
| L3 Cache associativity (data) |
32-way |
32-way |
32-way |
| Pipeline stages (integer/floating point) |
12/17 |
12/17 |
12/17 |
| L1/L2 data cache protection |
ECC |
ECC |
ECC |
| L1/L2 instruction cache protection |
Parity |
Parity |
Parity |
| Global History Counter Entries |
16K |
16K |
16K |
| L1 TLB entries 4KB pages (data/instruction) |
48/32 |
48/32 |
48/32 |
| L1 TLB associativity 4KB pages (data/instruction) |
Full/Full |
Full/Full |
Full/Full |
| L1 TLB entries 2/4MB pages (data/instruction) |
48/16 |
48/16 |
48/16 |
| L1 TLB associativity 2/4MB pages (data/instruction) |
Full/Full |
Full/Full |
Full/Full |
| L2 TLB entries 4KB pages (data/instruction) |
512/512 |
512/512 |
512/512 |
| L2 TLB associativity 4KB pages (data/instruction) |
4-way/4-way |
4-way/4-way |
4-way/4-way |
| L2 TLB entries 2/4MB pages (data) |
128 |
128 |
128 |
| L2 TLB associativity 2/4MB pages (data) |
2-way |
2-way |
2-way |
| AMD Wide Floating-Point Accelerator |
Yes |
Yes |
Yes |
| SIMD Instruction Support |
SSE, SSE2, SSE3, SSE4A |
SSE, SSE2, SSE3, SSE4A |
SSE, SSE2, SSE3, SSE4A |
| Process |
65 nanometer SOI |
65 nanometer SOI |
65 nanometer SOI |
| Manufactured In |
Fab 36, Dresden, Germany |
Fab 36, Dresden, Germany |
Fab 36, Dresden, Germany |
