AMD Discloses New Technologies At Microporcessor Forum
Including x86 64-bit Architecture and Lightning Data Transport™
SUNNYVALE, CA --
AMD Vice President of Engineering Fred Weber today disclosed details of AMD's x86 64-bit architecture and system bus of the future, Lightning Data Transport™. Both are planned to be implemented in AMD's eighth-generation microprocessor, code-named SledgeHammer.
"AMD plans to extend the x86 instruction set to include a 64-bit mode, delivering a simple yet powerful solution that enables all of the performance benefits associated with 64-bit computing, while maintaining compatability and a leading-edge performance roadmap for the existing installed base of x86 32-bit software applications and operating systems," said Weber. "No other 64-bit solution has full native x86 32- and 64-bit compatibility."
"AMD has disclosed specifications to the major OS vendors and Microsoft so that they may ensure that their operating systems and tools will be AMD x86 64-bit aware," added Weber.
This strategy enables MIS managers to continue using a tested and preferred instruction set, without having to choose one instruction set over another, or sacrifice current investments in 32-bit applications and operating systems.
"By extending the x86 instruction set to 64-bits, AMD's x86-64 technology should give us very fast compiler retargetting and the easiest kernel port so far," said Alan Cox, Linux Kernel Developer.
"AMD's x86-64 architecture provides an exciting alternative to Intel's IA 64 architecture," said Tom Copeland, vice president, workstations and high-performance systems, IDC. "x86-64 is the only 64-bit, x86-compatible alternative to IA 64. While IA 64 is a completely new architecture, AMD has elected to extend the existing x86 architecture to include 64-bit computing. AMD's approach will provide an easy way for users to continue to use their existing 32-bit applications and to adopt 64-bit applications as needed."
"Time and again, processor architects have looked at the inelegant x86 architecture and declared it cannot be stretched to accommodate the latest innovations," said Nathan Brookwood, principal analyst, Insight 64. "Time and again, a clever designer has proven them wrong. It seems truly ironic that Intel, the inventor of x86 architecture, has bet its 64-bit future on a radical new design, while the upstart AMD proposes a more conservative and compatible path. If AMD's approach pans out, customers will benefit from a wider array of choices for their high-end systems. Perhaps when architects in 2025 begin to debate the move to 128-bit computing, they won't be so quick to reject extensions to the x86-64 features AMD laid out today."
AMD's system bus of the future, called Lightning Data Transport (LDT) was also discussed at the forum. LDT provides a data link that is internal to the PC, providing up to 20x increase in bandwidth for I/O, co-processing and multi-processing functions. This increased I/O performance and bandwidth will improve overall system performance for AMD Athlon™ processor-based workstations, servers and personal computers.
"API plans to offer a two-way chipset and bridge chips during the second half of 2000 that incorporate a LDT interconnect, enabling industry leading I/O bandwidth and performance," stated Gerry Talbot, executive vice president, chief operating officer and chief technical officer, for API. "Pushing the envelope of I/O bandwidth will greatly improve router and web server capabilities, allowing technology to keep pace with the demands of markets like the Internet and telecommunications."
"LDT will compliment HotRail's smart switched fabric SMP core logic for servers based on AMD Athlon processors by providing increased scalability in the server I/O arena," said Rick Shriner, president and chief executive officer, HotRail Inc. "Together HotRail and AMD will drive servers to new levels of performance."
"These announcements once again demonstrate AMD technology leadership through platform innovations that meet customer's needs," said Dana Krelle, vice president of marketing for AMD's Computation Products Group.
About AMD's x86-64 bit Architecture
AMD x86 64-bit processors will permit platform suppliers, developers, and corporate MIS departments to transition to 64-bit environments at will, while continuing to run 32-bit applications without incurring performance penalties. This performance path is vital because most current applications rarely require the features that 64-bit instruction sets offer, and will not require the expense of being ported to 64-bits. By providing a seamless migration to 64-bit computing, AMD plans to offer a path that minimizes the cost of enabling 64-bit computing.
AMD will achieve this by extending x86 to include a 64-bit mode that has both a 64-bit address space and a 64-bit data space. Future 64-bit processors will be able to detect which mode is needed (32- or 64-bit) and compute accordingly.
About Lightning Data Transport™
LDT is an internal chip-to-chip interconnect that provides much greater bandwidth for I/O. It can achieve a bandwidth of up to 6.4 GB/sec per connection. Compared to current system interconnects that run up to 266 MB/sec, LDT provides more than a 20x increase in bandwidth. LDT complements externally visible bus standards such as PCI or SIO, and provides a very fast connection to both. LDT is the connection that can provide the bandwidth the new SIO standard needs to communicate with a server.
The presentation given by Fred Weber at the Microprocessor Forum is available on AMD's web site.
This release contains forward-looking statements, which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally preceded by words such as "plans," "expects," "believes," "anticipates" or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty that could cause actual results to differ materially from current expectations. Forward-looking statements in this release about the x86 64-bit and LDT technologies involve the risks that these technologies will not be implemented in the time frame expected, that vendors may not adequately support these new technologies in their bridge chips and chip sets, and that these new technologies will not achieve customer and market acceptance. We urge investors to review in detail the risks and uncertainties in the company's Securities and Exchange Commission filings.
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