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AXI Central DMA Controller

par: AMD

The AMD LogiCORE™ IP AXI Central Direct Memory Access (CDMA) core is a soft AMD Intellectual Property (IP) core for use with the Vivado™ Design Suite.

Outils de conception pris en charge: Vivado Software
Fourni avec: Vivado Software
Licence: End User License Agreement
Prise en charge des appareils: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC

Overview
Documentation
Supported Tool Version

Product Description

The AMD LogiCORE™ IP AXI Central Direct Memory Access (CDMA) core is a soft AMD Intellectual Property (IP) core for use with the Vivado™ Design Suite. The AXI CDMA provides high-bandwidth Direct Memory Access (DMA) between a memory-mapped source address and a memory-mapped destination address using the AXI4 protocol. An optional Scatter Gather (SG) feature can be used to offload control and sequencing tasks from the system CPU. Initialization, status, and control registers are accessed through an AXI4-Lite slave interface, suitable for the AMD MicroBlaze™ processor.

Key Features and Benefits

AXI4 interface for data transfer
Independent AXI4-Lite slave interface for register access
Independent AXI4 Master interface for optional Scatter/Gather function
Optional Data Re-Alignment Engine
Register Direct Mode
Optional Scatter Gather DMA support
Optional Store and Forward support
Parameterized Read and Write Address Pipeline depths
Fixed-address and incrementing-address burst support

Resource Utilization

AXI Central Direct Memory Access Resource Utilization

Documentation

Vivado IP Release Notes

This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.

View Release Note

PG034 - AXI Central Direct Memory Access IP Product Guide (PG034) (v4.1)

Provides high-bandwidth Direct Memory Access (DMA) between a memory-mapped source address and a memory-mapped destination address using the AXI4 protocol

View Product Guide