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Partial Reconfiguration Decoupler IP

发布者: AMD

设计工具支持: Vivado Software
捆绑产品: Vivado Software
许可: End User License Agreement
器件支持: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC

Overview
Documentation
Supported Tool Version

Product Description

The Partial Reconfiguration (PR) Decoupler IP provides logical isolation capabilities for PR designs. One or more PR Decoupler cores can be used to make the interface between a Reconfigurable Partition (RP) and the static logic safe from unpredictable activity while partial reconfiguration is occurring. When active, user-selected signals crossing between the RP and the static logic are driven to user configurable values. When inactive, signals are passed unaltered. PR Decoupler cores can be connected to the PR Controller IP or custom user controllers to create a complete Partial Reconfiguration management solution.

The PR Decoupler core can be customized for the number of interfaces, type of interfaces, decoupling functionality, status and control. AXI-based interfaces are natively supported; easily and efficiently enable AXI4-Stream based control, AXI4-Stream based status, or AXI4-Lite based status and control.

Key Features and Benefits

Support for all interface types registered in the Vivado™ Design Suite, including customer interfaces
Multiple interfaces allowed per decoupler
Unique decoupling behavior per interface
Each interface can have clock domain crossing support
Compatible with AXI4-Lite and AXI4-Stream user interfaces
Multiple status and control options
Connects directly to the Partial Reconfiguration Controller using the signal based control interface
Phased decoupling supported

Resource Utilization

Partial Reconfiguration Decoupler Resource Utilization

Documentation

Vivado Release Notes

The most updated Release Note.

View Release Note

PG227 - Partial Reconfiguration Decoupler v1.0 Product Guide (PG227) (v1.0)

The AMD Partial Reconfiguration Decoupler can be used to provide a safe and managed boundary between the static logic and a Reconfigurable Partition during Partial Reconfiguration.

View Product Guide

PG375 - Dynamic Function eXchange Decoupler LogiCORE IP Product Guide (PG375) (v1.0)

This core can be used to provide a safe and managed boundary between the static logic and a Reconfigurable Partition during Partial Reconfiguration.

View Product Guide dfx-decoupler.html