Partial Reconfiguration Decoupler IP
by: AMD
The Partial Reconfiguration (PR) Decoupler IP provides logical isolation capabilities for PR designs. One or more PR Decoupler cores can be used to make the interface between a Reconfigurable Partition (RP) and the static logic safe from unpredictable activity while partial reconfiguration is occurring.
- 설계 도구 지원: Vivado Software
- 번들 구성: Vivado Software
- 라이선스: End User License Agreement
- 디바이스 지원: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC