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    AMD Intellectual Property

Partial Reconfiguration Decoupler IP

作者: AMD

The Partial Reconfiguration (PR) Decoupler IP provides logical isolation capabilities for PR designs. One or more PR Decoupler cores can be used to make the interface between a Reconfigurable Partition (RP) and the static logic safe from unpredictable activity while partial reconfiguration is occurring.

  • 設計工具支援: Vivado Software
  • 隨附於: Vivado Software
  • 授權: End User License Agreement
  • 器件支援: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC