AMD Versal™ 自適應 SoC

The AMD Vitis™ software platform is a development environment for developing designs that include FPGA fabric, Arm® processor subsystems, and AI Engines. The Vitis tools work in conjunction with AMD Vivado™ Design Suite to provide a high level of abstraction over RTL for design development.

AMD Vitis™ AI is a production-ready AI inference stack for AMD adaptive SoCs. It helps developers compile, optimize, and deploy AI models on select AMD Versal™ AI Edge devices, using industry-standard frameworks. Designed for edge and Physical AI applications, Vitis AI helps streamline development, supports low-latency inference, and delivers high performance per watt for embedded AI applications.

The Vitis™ HLS tool allows users to easily create complex FPGA algorithms by synthesizing a C/C++ function into RTL. The Vitis HLS tool is tightly integrated with both the Vivado™ Design Suite for synthesis and place & route and the Vitis™ unified software platform for heterogeneous system designs and applications.

Vitis™ Model Composer is a model-based design tool that enables rapid design exploration within the MathWorks MATLAB® and Simulink® environment and accelerates the path to production on AMD devices through automatic code generation.​ ​ You can design your DSP algorithms and iterate through them using high-level, performance-optimized blocks and validate functional correctness through system-level simulations. Vitis Model Composer transforms your design into a production-quality implementation through automatic optimizations.

Vivado™ Design Suite is the design software for AMD adaptive SoCs and FPGAs. It includes: design entry, synthesis, place and route, and verification/simulation tools. Vivado tools support design entry in traditional HDL like VHDL and Verilog. It also supports a graphical user interface-based tool called the IP Integrator (IPI) that allows for a plug-and-play IP integration design environment. The Vivado Design Suite delivers exceptional synthesis and implementation for today’s complex FPGAs and adaptive SoCs with built-in capabilities for timing closure and methodology.

Built on the open-source Yocto Project™, AMD Embedded Development Framework (EDF) delivers a complete out-of-the-box experience with a modular, scalable, and system-level development environment that streamlines and accelerates the path from development to deployment.