AMD offers HDMI™ 2.1 IP subsystems and HDMI 1.4/2.0 IP subsystems. HDMI 2.1 IP Subsystems are designed to HDMI 2.1 specification and support earlier HDMI standards with support for FRL and TMDS modes and throughput up to 48Gbps. HDMI 1.4/2.0 IP Subsystems are designed to HDMI 1.4b/2.0 specification and support earlier standards with support for TMDS mode and throughput up to 18 Gbit/s.
HDMI 2.1 IP subsystems support Versal™ Adaptive SoC and Ultrascale+™ devices.
HDMI 1.4/2.0 IP subsystems support Versal Adaptive SoC, Ultrascale+, UltraScale™, 7 Series and Zynq™ 7000 SoC AMD FPGAs.
To help users in creating video solutions with HDMI interfaces, AMD offers prepackaged subsystems for HDMI receive or HDMI transmit. These subsystems integrate commonly used functions with video interfaces such as video timing generation, AXI bridges and optional HDCP function with HDMI core IP and work out of the box.
An additional physical layer implementation, as outlined below, is required for these subsystems:
- HDMI GT controller supports HDMI 1.4/2.0 & HDMI 2.1 subsystems on Versal Adaptive SoC devices.
- HDMI PHY controller supports HDMI 2.1 subsystems on Ultrascale+ devices.
- Video PHY controller support HDMI 1.4/2.0 subsystems on Ultrascale+, UltraScale, 7 Series and Zynq 7000 SoC AMD FPGAs.
For the most recent and complete list of supported features, devices, and speed grades, please refer to the respective product guides.
