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AXI Multichannel DMA

par: AMD

The AXI MCDMA facilitates large data migration, offloading the task from the embedded processor. It sits as an intermediary between an AXI Memory-Mapped embedded subsystem an AXI Streaming subsystem.

Outils de conception pris en charge: Vivado Software
Fourni avec: Vivado Software
Licence: End User License Agreement
Prise en charge des appareils: Kintex UltraScale, Kintex UltraScale+, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC

Overview
Documentation
Supported Tool Version

Product Description

The AXI MCDMA facilitates large data migration, offloading the task from the embedded processor. It sits as an intermediary between an AXI Memory-Mapped embedded subsystem an AXI Streaming subsystem.

The MCDMA IP is full-duplex, scatter-gather, and supports up to 16 channels. It may be configured as weighted round robin or strict priority.

Key Features and Benefits

64-bit addressing
Widths up to 1024 bits
Scatter Gather Descriptors
One Streaming interface, up to 16 Memory Mapped interfaces
Full Duplex: Egress (Streaming to Memory Mapped) and Ingress (Memory Mapped to Streaming)
Baremetal and Linux drivers
Synchronous and Asynchronous clocking

Resource Utilization

AXI MultiChannel DMA Resource Utilization

Documentation

Vivado IP Release Notes

This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.

View Release Note

PG150 - UltraScale Architecture-Based FPGAs Memory IP LogiCORE IP Product Guide (PG150) (v1.4)

Provides information about using, customizing, and simulating the DDR3 or DDR4 SDRAM, LPDDR3 SDRAM, QDR II+ SRAM, QDR-IV SRAM, or a RLDRAM 3 interface core. It also describes the core architecture and provides details on customizing and interfacing to the core.

View Product Guide qdriip.html qdriv.html xtp359-memory-ip-ultrascale-design-checklist.zip

PG288 - AXI Multichannel Direct Memory Access LogiCORE IP Product Guide (PG288) (v1.2)

Describes a soft AMD IP core for use with the AMD Vivado™ Design Suite. The AXI MCDMA provides high-bandwidth direct memory access between memory and AXI4-Stream target peripherals.

View Product Guide