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    AMD Intellectual Property

IP Utility IDELAYCRTL Logic

par: AMD

The IDELAYCTRL module provides a reference clock input that allows internal circuitry to derive a voltage bias, independent of PVT (process, voltage, and temperature) variations, in order to define precise delay tap values for the associated IDELAYE2 and ODELAYE2 components.

  • Outils de conception pris en charge: Vivado Software
  • Fourni avec: Vivado Software
  • Licence: End User License Agreement
  • Prise en charge des appareils: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC