IP Utility IDELAYCRTL Logic
by: AMD
The IDELAYCTRL module provides a reference clock input that allows internal circuitry to derive a voltage bias, independent of PVT (process, voltage, and temperature) variations, in order to define precise delay tap values for the associated IDELAYE2 and ODELAYE2 components.
- Suporte a ferramentas de projeto: Vivado Software
- Inclui: Vivado Software
- Licença: End User License Agreement
- Suporte ao dispositivo: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC