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An integrated development environment for designing embedded processing systems.
The following cores are included with AMD Embedded Edition. The IP works directly in AMD Platform Studio and supports MicroBlaze™ and PowerPC® for PLB-based cores and MicroBlaze for AXI-based cores.
- Processor IP Cores
- Interface/Bus/Bridge IP
- Peripheral IP
- Communications IP
- Infrastructure IP
- Memory Controller IP
- Debug IP
Processor IP Cores
| Core | PLB/AXI Interface Support |
|---|---|
| MicroBlaze V Soft Processor | AXI |
| MicroBlaze Soft Processor | PLB/AXI |
Interface/Bus/Bridge IP
| Core | PLB/AXI Interface Support |
|---|---|
| AXI to PLBv46 Bridge | PLB/AXI |
| PLBv46 to AXI Bridge | PLB/AXI |
| Mailbox | PLB/AXI |
| Mutex | PLB/AXI |
| AXI to APB Bridge | AXI |
| AXI to AXI Bridge | AXI |
| AXI to AHB Lite Bridge | AXI |
| AHB Lite to AXI Bridge | AXI |
| Local Memory Bus | PLB/AXI |
Peripheral IP
| Core | PLB/AXI Interface Support |
|---|---|
| AXI CAN (Controller Area Network) | AXI (fee based*) |
| XPS CAN (Controller Area Network) | PLB (fee based*) |
| AXI External Peripheral Controller | AXI |
| XPS External Peripheral Controller | PLB |
| AXI General Purpose I/O | AXI |
| XPS General Purpose I/O | PLB |
| AXI Hardware ICAP Controller | AXI |
| XPS Hardware ICAP Controller | PLB |
| AXI I3C | AXI |
| AXI IIC (Inter-Integrated Circuit) | PLB |
| XPS IIC (Inter-Integrated Circuit) | AXI |
| AXI Interrupt Controller | AXI |
| XPS Interrupt Controller | PLB |
| AXI Streaming FIFO | AXI |
| XPS Local Link FIFO | PLB |
| AXI System Monitor Interface | AXI |
| XPS System Monitor Interface | PLB |
| AXI Watchdog Timer | AXI |
| XPS Watchdog Timer | PLB |
| AXI Timer/Counter | AXI |
| XPS Timer/Counter | PLB |
| DMA Channelized Scatter / Gather Controller | PLB |
| Fixed Interval Timer | PLB |
| XPS PS2 Interface | PLB |
| AXI TFT Controller | AXI |
| XPS TFT Display | PLB |
| XPS Delta-Sigma ADC | PLB |
| XPS Delta-Sigma DAC | PLB |
Communications IP
| Core | PLB/AXI Interface Support |
|---|---|
| AXI EthernetLite | AXI |
| AXI Ethernet | AXI (fee based*) |
| AXI UART16550 | AXI |
| AXI UARTLite | AXI |
| XPS UARTLite | PLB |
| AXI USB2 Device Controller | AXI (fee based*) |
| XPS USB2 Device Controller | PLB (fee based*) |
| AXI PCIe Bridge | AXI |
Infrastructure IP
| Core | PLB/AXI Interface Support |
|---|---|
| AXI Chip2Chip | AXI |
| AXI Exerciser | AXI |
| AXI Performance Monitor | AXI |
| AXI SmartConnect | AXI |
| Clock Generator | PLB/AXI |
| Bus Splitter Utility | PLB/AXI |
| Flip-Flop Utility | PLB/AXI |
| Soft ECC Proxy | AXI |
| Vector to Bit Reduction Utility | PLB/AXI |
| Vector Logic Utility | PLB/AXI |
Memory Controller IP
| Core | PLB/AXI Interface Support |
|---|---|
| MultiPort Memory Controller | PLB |
| MicroBlaze LMB BRAM Controller | PLB |
| AXI BRAM Interface Controller | AXI |
| XPS BRAM Interface Controller | PLB |
| AXI System Ace™ Interface Controller | AXI |
| XPS System Ace Interface Controller | PLB |
| XPS SPI (Serial Peripheral Interface) | PLB |
| AXI Quad SPI | AXI |
| XPS In-System Flash | PLB |
| AXI External Memory Controller | AXI |
| XPS External Memory Controller | PLB |
| AXI DMA Controller | AXI |
| AXI Multichannel DMA | AXI |
| AXI Video DMA Controller | AXI |
| XPS Central DMA Controller | PLB |
Debug IP
| Core | PLB/AXI Interface Support |
|---|---|
| AXI to JTAG Converter | AXI |
| ChipScope Pro Logic Analyzer (ILA) | PLB/AXI |
| ChipScope Pro Bus Analyzer (IBA) | PLB |
| ChipScope Pro Virutal IO (VIO) | PLB/AXI |
| ChipScope Integrated Controller (ICON) | PLB/AXI |
| ChipScope AXI Monitor | AXI |
| Integrated Logic Analyzer (ILA) | AXI |
| JTAG to AXI Master | AXI |
| MicroBlaze Debug Module (MDM) | PLB/AXI |
| System Integrated Logic Analyzer (System ILA) | AXI |
| Virtual Input/Output (VIO) | AXI |
* see datasheet for evaluation and purchase options
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