Free LogiCORE™ IP design enabling the use of multi-gigabit transceivers for AMD FPGA.
Aurora is a LogiCORE IP designed to enable easy implementation of AMD transceivers while providing a light-weight user interface on top of which designers can build a serial link. Aurora 8B/10B is a scalable, lightweight, link-layer protocol for high-speed serial communication. The protocol specification is open and available upon request. The IP is free from the IP Catalog on AMD silicon devices.
Aurora is typically used in applications where other industry standard serial interfaces are not needed and Aurora delivers low-cost, high data-rate, scalable and flexible means to build a serial data channel. Its simple framing structure can easily be used to encapsulate data from existing protocols, and its electrical requirements are compatible with commodity equipment. Aurora can be used to provide increased performance without high FPGA resource costs, software redevelopment, or exotic physical infrastructure.
Applications
Aurora can be used in any application that requires serial point-to-point connectivity. Example applications include:
- Chip-to-chip links. Replacing parallel connections between chips with high-speed serial connections can significantly reduce the number of traces and layers required on a PCB. The core provides the logic needed to use GTP, GTX, and GTH transceivers, with
minimal FPGA resource cost.
- Board-to-board and backplane links. The core uses standard 8B/10B encoding, making it compatible with many existing hardware standards for cables and backplanes. Aurora 8B/10B cores can be scaled, both in line rate and channel width, to allow inexpensive legacy hardware to be used in new, high-performance systems.
- Simplex connections (unidirectional). Aurora protocol provides alternate ways to perform unidirectional channel initialization making possible the use of the GTP, GTX, and GTH transceivers in the absence of a back channel and to reduce costs due to unused full-duplex resources.
