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Advanced Encryption Standard (AES )

作者: AMD

The AES core provides encyrption and decryption functions that are compliant to the Federal Information Processing Standard (FIPS), Publication 197.

设计工具支持: Vivado Software
授權: Core License Agreement
器件支持: Kintex UltraScale, Kintex UltraScale+, Virtex UltraScale, Virtex UltraScale+, Zynq UltraScale+ MPSoC, Zynq UltraScale+ RFSoC

Overview
Documentation
Supported Tool Version

Product Description

This product has been discontinued. Not recommended for new designs.

The AMD AES core provides encryption and decryption functions that are compliant to the Federal Information Processing Standard (FIPS), Publication 197. The core comes with built-in key expansion for both encryption and decryption functions. The AES IP enables customers to accelerate Data Center Storage (NVMe encryption and decryption) by offloading this critical processing of data at the full line rate (100Gbps).

Key Features and Benefits

AXI-Stream interface with 128, 256, and 512 data-width options
Support AES-XTS-128/256, ECB-128/192/256 and CFB 128/192/256
Both pipelined and lite design variants, for a choice between performance and resources
Key and IV pre-fetch to achieve zero latency between successive data units

Resource Utilization

Resource Utilization for Advanced Encryption Standard (AES)

Documentation

Vivado IP Release Notes

This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.

View Release Note

PG383 - Advanced Encryption Standard (AES) Engine LogiCORE IP Product Guide (PG383) (v1.1)

The LogiCORE™ IP Advanced Encryption Standard (AES) Engine core provides encryption and decryption functions compliant to the Federal Information Processing Standard (FIPS) Publication 197 from the US National Institute of Standards and Technology (NIST) and other standards, if applicable.

View Product Guide aes.html