作者: AMD
The Video DMA LogiCORE™ IP is provided to work in conjunction with the Video Frame Buffer Controller PIM within the Multiport Memory Controller for DMA access to external memory for video systems.
Obsoleted in 2019.1 and not recommended for new designs.
Relacement is the AXI Video DMA or Frame Buffer Write/Read bundled with Vivado™.
Please refer to Product Discontinuation Notice XCN18017.
The Video DMA LogiCORE™ IP is provided to work in conjunction with the Video Frame Buffer Controller PIM within the Multiport Memory Controller for DMA access to external memory for video systems. The core is programmable directly by the Microblaze™ through the host interface, provides for horizontal cropping to one pixel, and Gen-lock interface to synchronize multiple VDMA blocks.
Obsoleted in 2019.1 and not recommended for new designs.
Relacement is the AXI Video DMA or Frame Buffer Write/Read bundled with Vivado™.
Please refer to Product Discontinuation Notice XCN18017.
| LogiCORE™ | Version | Software Support | Supported Device Families |
|---|---|---|---|
| Video DMA |
v1.1 | ISE™ 12.3 | Virtex™ 6 CXT / HXT / LXT / SXT / -1L Virtex 5 TXT/ FXT / SXT / LXT / LX Spartan™ 3A DSP |
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