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Distributed Memory Generator

作者: AMD

AMD provides a Distributed Memory Generator LogiCORE™ to help you build on-chip Distributed Memories with SelectRAM quickly and easily.

設計工具支援: Vivado Software, ISE Design Suite
隨附於: Vivado Software, ISE Design Suite
授權: End User License Agreement
器件支援: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq UltraScale+ MPSoC, Zynq 7000

Overview
Documentation
Supported Tool Versions

Product Description

The Distributed Memory Generator is provided under the terms of the End User License and is included with ISE™ and Vivado™ design tools at no additional charge.

The Distributed Memory Generator IP core creates a variety of memory structures using Select RAM. It can be used to create Read Only Memory (ROM), single-port Random Access Memory (RAM), and simple dual/Dual port RAM as well as SRL16-based RAM. Flexible feature set allows users to customize for Memory type, Data width, Memory size, Input/Output options and reset options.

Key Features and Benefits

Generates Read Only Memories (ROMs), Single, Simple Dual and Dual-port Random Access Memories (RAMs), and SRL16-based RAMs
Supports data depths ranging from 16 to 65,536 words
Supports data widths ranging from 1 to 1024 bits
Optional registered inputs and outputs
Example Design helps you get up and running quickly

Resource Utilization

Resource Utilization for Distributed Memory Generator