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SPDIF

作者: AMD

The LogiCORE™ IP Triple-Rate SDI interface solution provides receiver and transmitter interfaces for the SMPTE SD-SDI, HD-SDI, and 3G-SDI standards.

产品编号:
- No Charge
设计工具支持: Vivado Software
捆绑产品: Vivado Software
授權: End User License Agreement
器件支持: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq UltraScale+ MPSoC, Zynq 7000

Overview
Documentation

Product Description

SPDIF is now bundled with Vivado™

AMD provides a SPDIF/AES3 Controller to transport audio data.

The Sony/Philips Digital Interconnect Format (SPDIF) and AES3 are digital audio interfaces that implements the International Electronic Commission (IEC) 60958 interface for transmitting and receiving audio data. AES3 and SPDIF at the protocol level are same but use different physical interfaces primarily driven by their end application needs. AES3 is commonly used in professional audio and video equipment where as SPDIF is more popular in the consumer media devices. AMD offers a single core to implement the AES3 and SPDIF controller but users should be aware the differences in the physical interfaces. The core also includes standard bus interfaces to the AMBA® AXI4-Lite and AXI4-Stream interfaces, allowing for integration to the IP core with a master system for further processing of audio data. Data collected by the LogiCORE™ IP SPDIF core is stored in the core’s internal FIFO, allowing the system to process a relatively slow audio stream.

Key Features and Benefits

Configurable as an SPDIF/AES3 audio data transmitter or an SPDIF/AES3 audio data
Configurable FIFO buffer stores the audio sample data

SPDIF/AES3 controller

IEC 60958-3 standard SPDIF/AES3 digital audio bus interface
Two audio channels
Audio sample lengths of 16/20/24 bits
Data recovery from the bi-phase mark encoded SPDIF/AES3 data when the IP core is in receive mode
Variable sampling rates (32/44.1/48/88.2/96/ 176.4/192 kHz)
The SPDIF/AES3 transmitter sends the invalid null audio frames over the SPDIF/AES3 line in case of a FIFO under-run condition

AXI4-Stream Interface

Based on AXI4-Stream specification
Master/slave on AXI4 streaming interface
32-bit data width support
Continuous aligned streams only (no null or positional bytes transmission support)

AXI4-Lite Interface

Register access support through the AXI4-Lite interface
32-bit data width support

Documentation

Vivado IP Release Notes

This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.

View Release Note

PG045 - S/PDIF v2.0 Product Guide (PG045) (v2.0)

The SPDIF core is a digital audio interface controller that implements the IEC 60958-3 interface for transmitting and receiving audio data.

View Product Guide

_{Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.}

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SPDIF

Product Description

Key Features and Benefits

Related Products

Documentation

Vivado IP Release Notes

PG045 - S/PDIF v2.0 Product Guide (PG045) (v2.0)

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