作者: AMD
The AMD Versal™ programmable network on chip (NoC) is an AXI-interconnecting network used for sharing data between IP endpoints in the programmable logic (PL), the processing system (PS), and hardend DDR4/LPDDR4 Memory Controller.
The AMD Versal™ programmable network on chip (NoC) is an AXI-interconnecting network used for sharing data between IP endpoints in the programmable logic (PL), the processing system (PS), and hardend DDR4/LPDDR4 Memory Controller. This device-wide infrastructure is a high-speed, integrated data path with dedicated switching. The integrated DDR Memory Controller supports both the DDR4 and LPDDR4/4X memory interfaces. It has four programmable NoC interface ports and is designed to handle multiple streams of traffic and supports five Quality of Service (QoS) classes to ensure appropriate prioritization of commands. The controller accepts burst transactions and implements command reordering to maximize efficiency of the memory interface. Reliability features include error correction, address parity, and DQS gate tracking. Power saving features include DRAM selfrefresh and automatic DRAM power down.
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