by: AMD
The Video In to AXI-4 Stream LogiCORE™ IP core converts common parallel video signals (such as from a DVI PHY) to an AXI4-Stream interface.
Included at no additional charge with Vivado™ software.
AMD Video in to AXI4-Stream IP core enables video designers to quickly and easily connect external video signals to video processing blocks that use AXI4-Stream.
The Video In to AXI-4 Stream LogiCORE™ IP core converts common parallel video signals (such as from a DVI PHY) to an AXI4-Stream interface. The input video signals must have data, clock, DE, sync signals (Vsync and Hsync) and/or blanking signals (Vblank and Hblank). The AXI4-Stream interface signals are compliant to the AXI4-Stream Video Protocol as defined in the AXI Reference Guide (UG761), and as is implemented on most AMD Video IP cores. This enables video designers to quickly and easily connect an external video source to subsequent processing blocks that use a video protocol on the AXI4-Stream interface (such as AMD Video IP). This core works in conjunction with the AMD Video Timing Controller (VTC) core to detect characteristics of the incoming video format that can be read by a system processor and used to configure subsequent processing blocks. Source code is provided with the core to allow customers to adapt the core to work with unique video signals that may not already be included in the core.
Hardware Evaluation Time Out Period * : ~ 1-8 hrs
| LogiCORE™ | Version | AXI4 Support | Software Support | Supported Device Families |
|---|---|---|---|---|
| Video In to AXI4-Stream | v5.0 | AXI4-Stream | Vivado™ 2021.2 | Versal™ Kintex™ UltraScale+™ Virtex™ UltraScale+ Zynq™ UltraScale+ Kintex UltraScale™ Virtex UltraScale Zynq 7000 Artix™ 7 Kintex 7 Virtex 7 / XT |
| Video In to AXI4-Stream | v2.01a | AXI4-Stream | ISE™ 14.3 | Zynq 7000 Artix 7 Kintex 7 Virtex 7 / XT Virtex 6 HXT / LXT / SXT Spartan™ 6 LXT / LX |
Download the required software from the AMD Downloads page. For information on New Features, Known Issues, and Patches please refer to the Licensing Solution Center.
* A Hardware Evaluation license for any of the IP cores above will enable you to parameterize, generate and instantiate these cores in your design. You will also be able to perform functional and timing simulation and generate a bitstream that you can use to download and configure your design in hardware.
The IP cores in this table will be fully functional in the programmed device for certain amount of time. After this time, the IP will "time out" (cease to function) and you will need to download and configure the FPGA again.
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