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    AMD Intellectual Property

AXI HBICAP

作者: AMD

The AXI High Bandwidth Internal Configuration Access Port (HBICAP) LogiCORE™ IP core for the AXI Interface enables an embedded microprocessor, such as the MicroBlaze™ processor, to read and write the FPGA configuration memory through the internal configuration access port (ICAPEn).

  • 設計工具支援: Vivado Software
  • 隨附於: Vivado Software
  • 授權: End User License Agreement
  • 器件支援: Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC