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    AMD Intellectual Property

Adder/Subtracter

作者: AMD

The Adder/Subtracter IP provides LUT and single DSP slice add/sub implementations.

  • 設計工具支援: Vivado Software, ISE Design Suite
  • 隨附於: Vivado Software, ISE Design Suite
  • 授權: End User License Agreement
  • 器件支援: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Spartan 7, Spartan UltraScale+, Versal AI Core, Versal AI Edge, Versal HBM, Versal Premium, Versal Prime, Virtex 6, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC