Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
von: AMD
The Adder/Subtracter IP provides LUT and single DSP slice add/sub implementations.
The Adder/Subtracter IP provides LUT and single DSP slice add/sub implementations. The Adder/Subtracter module can implement adders (A+B), subtracters (A–B), and dynamically configurable adder/subtracters which operate on signed or unsigned data. The function can be implemented in a single DSP slice or LUTs. The module can be pipelined.
LogiCORE™ | Version | Software Support | Supported Device Families |
---|---|---|---|
Adder/Subracter | v12.0 | Vivado™ 2020.2 | Versal™ Kintex™ UltraScale+™ Virtex™ UltraScale+ Zynq™ UltraScale+ Kintex UltraScale™ Virtex UltraScale Zynq 7000 Artix™ 7 Kintex 7 / -2L Virtex 7 / -2L / XT |
Adder/Subracter | v11.0 | ISE™ 14.1 | Artix 7 Kintex 7 / -2L Virtex 7 / -2L / XT Virtex 6 CXT / HXT / SXT / LXT/ -1L Virtex 5 TXT / SXT / LXT / FXT Virtex 4 SX / LX / FX Spartan™ 6 LX / LXT Spartan 3A / 3A DSP Spartan 3 / 3E |
Download the required software from the AMD Downloads page. For information on New Features, Known Issues, and Patches please refer to the Licensing Solution Center.
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.