Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
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UltraScale+™ Device Integrated Block for PCI Express® (PCIe®)
作者: AMD
The AMD UltraScale+™ FPGA Integrated Block for PCI Express® solution IP core is a high-bandwidth, scalable, and reliable serial interconnect building block solution for use with UltraScale+ devices.
- 设计工具支持: Vivado Software
- 捆绑产品: Vivado Software
- 授權: End User License Agreement
- 器件支持: Virtex UltraScale+, Kintex UltraScale+, Zynq UltraScale+ MPSoC