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    AMD Intellectual Property

LD-based Parallel Latch

by: AMD

The LD-based Parallel Latch IP core is a latch-based data register with 1 to 64 bits width.

  • 설계 도구 지원: ISE Design Suite
  • 번들 구성: ISE Design Suite
  • 디바이스 지원: Spartan 3, Spartan 3E, Virtex FPGAs, Virtex E, Virtex II, Virtex II Pro