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Radio over Ethernet (RoE) Subsystem

von: AMD

The AMD Radio over Ethernet Framer (RoE Framer) core is part of a complete subsystem solution developed on the Zynq™ UltraScale+™ MPSoC, relying on both hardware and software to provide a comprehensive and efficient computing platform for the required protocols and features: eCPRI™, IEEE 1914.3, IEEE 1588, Synchronous Ethernet, Node and Network OAM.

Teilenummer:
- EF-DI-ROE-FRAMER-SITE
Support für Designtools: Vivado Software
Lizenzierung: Core License Agreement
Geräteunterstützung: Kintex UltraScale, Kintex UltraScale+, Versal AI Core, Versal Prime, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC, Zynq UltraScale+ RFSoC

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Overview
Documentation
Order
Supported Tool Version

Product Description

Enables next generation 5G eCPRI™ wireless applications.

The AMD Radio over Ethernet Framer (RoE Framer) core is part of a complete eCPRI™ and Next Generation Fronthaul Interface (NGFI) system solution developed on the Zynq™ UltraScale+™ MPSoC, relying on both hardware and software to provide a comprehensive and efficient computing platform for the required protocols and features: O-RAN, eCPRI, IEEE 1914.3 (NGFI), IEEE 1588, Synchronous Ethernet, and Node and Network OAM. The core enables radio data transmission through a packet-based transport network connecting Remote Radio Units (RRUs) to the centralized Baseband Unit (BBU).

Key Features and Benefits

Includes eCPRI example design
Supports IEEE 802.1 Ethernet packets, optionally including VLAN tags, as well as UDP over IPv4 or IPv6.
Automates in hardware the encapsulation and extraction of I/Q radio samples in and from the transported packets, formed according to the eCPRI Specification V1.1
Fully programmable filtering rules allow the hardware to identify and manage user plane packets.
Each Ethernet and IP/UDP header field is fully programmable.
Alignment to an external 10 ms Start of Radio Frame pulse, enabling 1588 synchronization.
In O-RAN (formerly xRAN) mode, the core implements O-RAN Control, User and Synchronization Plane Specification v2.0 (O-RAN Specification v2.0). Not all features are supported; see the O-RAN Support Matrix for full details. In this mode, the core supports up to four 10 Gb/s or four 25 Gb/s Ethernet ports. Mixed rate mode is not supported.
- Currently supports one component carrier (CC), with independent uplink and downlink timers.
- Supports a resolution of down to one resource block (RB) per section message. This release is limited to 64 section messages per symbol.
- U-Plane support for up to 16 spatial streams with 2048 flow IDs and four shared unsolicited data streams.
- The core implements the radio fronthaul interface, managing both the control and user planes, implementing the appropriate timing advances and compensating for the delay variations of packets coming from different BBUs. User radio blocks with related beam IDs are extracted from received packets at the appropriate symbol period and forwarded through AXI4-Stream outputs to external double buffers interfacing the beamforming function.
In non-O-RAN mode, the core supports up to four 10 Gb/s or two 25 Gb/s Ethernet ports.
- Automates in hardware the encapsulation and extraction of I/Q radio samples in and from the transported packets, formed according to either the eCPRI Specification v2.0 (eCPRI Specification V2.0), or the IEEE 1914.3-2018 IEEE Standard for Radio Over Ethernet Encapsulations and Mappings (IEEE 1914.3) specification
- Transport either time domain or frequency domain I/Q samples, the latter together with real-time control packets.
- A programmable reception window allows you to store a convenient number of incoming packets per stream, trading off latency with resilience against packet delay variation and reordering capability.
- Supports eCPRI message types #0 and #2 in hardware, and several others in software including one-way delay measurement based on PCS/PMA level timestamps, relying on software API.
- Each supported antenna-carrier flow can be associated to a programmable flow identifier, as well as to a specific packet type and Ethernet port number.
- Two reference designs are provided: an example design and an example system.

Documentation

Vivado IP Release Notes

This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.

View Release Note

PB056 - Radio over Ethernet Framer v3.0 Product Brief (PB056) (v3.0)

This core is part of a complete subsystem solution developed on the Zynq™ UltraScale+™ MPSoC to provide a comprehensive and efficient computing platform for eCPRI™, IEEE 1588, Synchronous Ethernet, and Node and Network OAM.

View Product Brief

Radio Over Ethernet (RoE) Subsystem Ordering Instructions

Access to the Radio Over Ethernet(RoE) Subsystem

Full access to this IP core, including bitstream generation capability, requires that you generate and install a Full License Key.

The sole purpose of the Radio Over Ethernet(RoE) Subsystem core is to help you develop designs for AMD devices. AMD reserves the right to deny access to the IP core products. The Radio Over Ethernet(RoE) Subsystem IP core is licensed under the Core License Agreement.

ROE Framer IP (EF-DI-ROE-FRAMER-SITE) was included with the ORAN mode up until Vivado™ 2019.2. In 2020.1, ORAN mode became a separate IP core named ORAN Radio Interface IP (EF-DI-ORAN-RADIO-IF-SITE). All users in warranty up to 2019.2, automatically received access to both cores. In 2020.1 and onward, each core is sold separately.

Requirements

Please refer to the Requirements link on the product page for this core for information on:

Software and system requirements
Licensing terms and conditions for evaluation

Ordering Information

To purchase any of these IP cores, contact your local Sales Representative referencing the appropriate part number(s) in below table.

Description	License Key	Part Number
LogiCORE™, Radio Over Ethernt Subsystem, Site License	roe_framer	EF-DI-ROE-FRAMER-SITE

Ethernet Framer (RoE Framer) Supported Tool Version

Hardware Evaluation Time Out Period * : ~ 8 hrs

LogiCORE™	Version	AXI Support	Software Support	Supported Device Families
Ethernet Framer (RoE Framer)	v3.0	AXI4-Stream	Vivado™ 2022.2	Versal™ Adaptive SoC Kintex™ UltraScale™ Virtex™ UltraScale Kintex UltraScale+™ Virtex UltraScale+ Zynq™ 7000 SoC Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC

Download the required software from the AMD Downloads page. For information on New Features, Known Issues, and Patches please refer to the Licensing Solution Center.

* A Hardware Evaluation license for any of the IP cores above will enable you to parameterize, generate and instantiate these cores in your design. You will also be able to perform functional and timing simulation and generate a bitstream that you can use to download and configure your design in hardware.

The IP cores in this table will be fully functional in the programmed device for certain amount of time. After this time, the IP will "time out" (cease to function) and you will need to download and configure the FPGA again.

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Radio over Ethernet (RoE) Subsystem

Product Description

Key Features and Benefits

Related Products

Documentation

Vivado IP Release Notes

PB056 - Radio over Ethernet Framer v3.0 Product Brief (PB056) (v3.0)

Radio Over Ethernet (RoE) Subsystem Ordering Instructions

Access to the Radio Over Ethernet(RoE) Subsystem

Requirements

Ordering Information

Ethernet Framer (RoE Framer) Supported Tool Version

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