作成者: AMD
The AMD Spartan™ 3 LogiCORE™ Endpoint PIPE for PCI Express® (PCIe®) protocol layer core is available for AMD low-cost 90nm Spartan 3/3E/3A families.
The Spartan™ 3 LogiCORE™ Endpoint PIPE for PCI Express® (PCIe®) protocol layer core is available for low-cost 90nm Spartan 3/3E/3A families. PCIe is a high-speed duplex serial interface standard supported by many industry leaders. The PCIe PIPE Endpoint LogiCORE combined with a discrete PCIe PHY offers a complete PCIe Endpoint solution fully compliant to the PCI Express Base Specification v1.1.
Hardware Evaluation Time Out Period * : ~ 8 hrs
| LogiCORE™ | Version | Required Patches | Software Support | Supported Device Families |
|---|---|---|---|---|
| Endpoint PIPE for PCI Express® | v1.8 | ISE™ 12.2 | ISE 12.2 | Spartan™ 3 (-4) Spartan 3E (-4) Spartan 3A (-4) |
| Accessing the NXP PX1011A PHY Simulation Files | ||
A NXP PX1011A-EL1 PCI Express PHY model is required to simulate the LogiCORE™ IP Endpoint PIPE for PCI Express (EF-DI-PCIE-PIPE-SITE). This PHY model is the property of NXP, and is not included with the LogiCORE IP release. Please refer to the Getting Started Guide for information on accessing this model. Be sure to include your complete contact information in any correspondence with NXP to facilitate a prompt response. |
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.