Efficient Instruction Cache Attacks via Self-Modifying Code Conflicts

Bulletin ID:     AMD-SB-7024
Potential Impact: N/A
Severity: N/A

Summary

AMD is aware of a paper titled ‘SMaCK: Efficient Instruction Cache Attacks via Self-Modifying Code Conflicts,’ published by researchers from Iowa State University and Google^®.

The research paper attempts to extend data-cache-side channels to the instruction cache to expand the attack surface. It discusses the security implications of SMC (Self-Modifying Code) by examining how specific x86 instructions affecting instruction cache lines could lead to measurable timing discrepancies.

The paper describes several attack techniques that leverage these timing variations to enhance existing methods, such as Prime+Probe and Flush+Reload. The researchers claim these techniques could allow adversaries to attack cryptographic keys, create covert channels akin to Spectre, and capture keystrokes across x86 platforms.

AMD has evaluated the paper and determined that it did not identify any novel cache side-channel-based vulnerabilities. Instead, it describes new methods for exploiting existing vulnerabilities. AMD believes the existing recommendations would be applicable    to mitigate the attacks described in the researcher’s paper. 

Mitigation

Please refer to the previous guidance provided on Software Techniques For Managing Speculation On AMD Processors. AMD also recommends that software developers employ existing best practices, including constant-time algorithms and avoid secret-dependent data accesses or control flows where appropriate to help mitigate this potential vulnerability and other potential cache side-channels.

Acknowledgement

AMD thanks Berk Gulmezoglu, Seonghun Son of Iowa State University, and Daniel Moghimi of Google^® for reporting these issues to us and engaging in coordinated vulnerability disclosure.

Revisions

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