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Undervoltage-based Static Side-channel Attacks (“Chypnosis”) on FPGAs

AMD ID: AMD-SB-8018
Potential Impact: Loss of Confidentiality
Severity: Medium

Summary

This document describes a potential attack technique against FPGA devices that leverages side-channel analysis (SCA) techniques to physically extract register and memory content from the device. In applications following best practices for security, critical data, such as decryption keys, is only retained in device registers and memories for a limited time. The newly reported attack makes use of a brownout condition to put the device into a hibernation state in which the transistors cannot switch anymore, but the register and memory content is preserved1. To achieve this, the attacker rapidly lowers the supply voltage below the logic operation threshold but above the data retention threshold. On-chip mechanisms to detect the voltage drop and react by clearing critical data are rendered ineffective by the fast voltage drop. Once the hibernation region has been entered, the attacker has unlimited time to extract the data.

The academic research paper introducing the new approach demonstrates the attack on the programmable logic (PL) in AMD Artix™ 7-Series FPGA devices. It shows that the on-chip XADC-based voltage monitor is too slow to detect and/or execute a tamper response to clear memory contents. Furthermore, they show that detection circuits that have been developed to detect clock freezing2 are ineffective as well. In general, the attack can be applied on all ICs that do not have effective tamper responses to clear sensitive data in case of an undervoltage event.

Affected Products and Mitigation

FPGA customers who believe this attack is in scope for their application and a loss of confidentiality of data processed in the PL is a concern should implement a clock monitor in the programmable logic and an asynchronous reset mechanism. The reporters of the vulnerability have experimentally verified the effectiveness of such a mitigation. AMD believes this can be an effective mitigation but has not confirmed its efficacy.  

AMD believes Kintex™ 7-Series FPGA and Artix™ 7-Series FPGA are affected. 

AMD is investigating whether the following devices and components are affected and plans to provide updates as new findings emerge.

  • Alveo™ Card (UltraScale™ and UltraScale+™ based)
  • Artix™ UltraScale+™ FPGA  
  • Kria™ SOM   
  • Kintex™ UltraScale™ FPGA 
  • Kintex™ UltraScale+™ FPGA
  • Spartan™-6 FPGA    
  • Spartan™ UltraScale+™ FPGA        
  • Versal™ Adaptive SoCs
  • Virtex™ UltraScale™ FPGA  
  • Virtex™ UltraScale+™ FPGA
  • Zynq™ UltraScale+™ RFSoC          
  • Zynq™ UltraScale+™ MPSoC

Acknowledgement 

AMD thanks K. Mitard, S. K. Monfared, F. K. Dana and S. Tajik for reporting this issue. 

References

  1. K. Mitard, S. K. Monfared, F. K. Dana and S. Tajik, "Chypnosis: Stealthy Secret Extraction using Undervolting-based Static Side-channel Attacks," 2025. [Online]. Available: https://arxiv.org/abs/2504.11633. 
  2. R. Dumitru, T. Moos, A. Wabnitz and Y. Yarom, "On Borrowed Time–Preventing Static Side-Channel Analysis," in Network and Distributed System Security (NDSS) Symposium, 2025.

Revisions 

Revision Date Description
2025-09-18 Initial publication

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