Vitis Tutorials

Introduction to the Versal™ Adaptive SoC AI Engine and to its programming model

This tutorial shows you how to use Vitis with AWS EC2 F1. Source code is provided. You may be able to use the Vitis tutorial instructions with other cloud providers or your local hardware.

Level Boards Version Download link
Introductory VCK5000 2022.2 Begin tutorial
Compute Acceleration using Vitis™ Development Tools

These labs will provide hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware. You will learn how to develop applications using the Vitis development environment that supports OpenCL/C/C++ and RTL kernels.

Level Boards Version Download link
Introductory AWS-F1, Alveo™ 2021.1 Begin tutorial

Vivado Tutorials

FPGA Design Flow using Vivado™

This course provides professors with an introduction to digital design tool flow in AMD devices using Vivado™ Design Suite.

Level Boards Version Download link
Introductory ZedBoard, ZYBO, Nexys4/DDR, NexysVideo, Basys3, PYNQ-Z1, PYNQ-Z2 2021x, 2018x, 2016x, 2015x Begin tutorial
Embedded System Design Flow on Zynq™

This course provides professors with an introduction to embedded system design flow on Zynq™ using ZedBoard  and AMD Vivado™ Design Suite.

Level Boards Version Download link
Introductory ZedBoard, ZYBO, PYNQ-Z1, PYNQ-Z2 2021x, 2018x, 2015x, 2014x Begin tutorial
High-Level Synthesis Flow on Zynq

This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems using Vivado™ HLS.

Level Boards Version Download link
Introductory ZedBoard, ZYBO, PYNQ-Z1, PYNQ-Z2 2021x, 2018x, 2017x, 2016x Begin tutorial
Advanced Embedded System Design on Zynq

Hands-on workshop that equips professors to build complex embedded systems using Vivado™ Design Suite and apply advanced design techniques on the Zynq™ System on a Chip (SoC).

Level Boards Version Download link
Intermediate ZedBoard, ZYBO, PYNQ-Z1, PYNQ-Z2 2018x, 2017x, 2016x Begin tutorial
Partial Reconfiguration Flow on Zynq

This course provides professors with an introduction to the partial reconfiguration design flow in AMD FPGAs using Vivado™ design tools.

Level Boards Version Download link
Intermediate ZedBoard, ZYBO 2016x, 2015x, 2014x Begin tutorial
Embedded Linux on Zynq (Archived)

Course that equips university academics to teach and research Embedded Linux® on Zynq™ using Vivado™ with confidence.

Level Boards Version Download link
Intermediate ZedBoard, ZYBO 2016x, 2015x, 2014x Begin tutorial

Teaching Solutions

HDL Design

Tutorial introduces students to the digital design flow on AMD programmable devices using the Vivado design software suite, with labs focused on core HDL modeling and hands-on problem solving.

Level Boards Version Download link
Introductory Nexys4/DDR, Basys3 2015.1, 2013.3 View
Digital Design Using Vivado IPI

Tutorial introduces the digital design flow on AMD programmable devices using Vivado IP Integrator (IPI), with a step-by-step guide to creating and using a custom IPI block.

Level Boards Version Download link
Intermediate Nexys4/DDR, Basys3 2014.2 View
Riallto - an exploration framework for the AMD Ryzen AI NPU

Guide to AMD’s Ryzen AI NPU—the first Neural Processing Unit for x86 computers—launched in 2023 with select Ryzen 7040 device family platforms and powering Microsoft Window Studio Effects in AMD Ryzen AI laptops.

Level Boards Version Download link
Intermediate Ryzen AI V1.1, v1.0 View