Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
by: AMD
The AMD Zynq™ UltraScale+™ RFSoC DFE Adaptable SoCs contain a variety of dedicated hardened signal processing primitives, which address the challenges of high-speed, low-power radio design.
The AMD Zynq™ UltraScale+™ RFSoC DFE adaptable SoCs contain a variety of dedicated hardened signal processing primitives, which address the challenges of high-speed, low-power radio design. These hardened primitives are supported by several LogiCores™ which can be found in the Vivado™ IP Catalog. The Product Guides for these LogiCores are listed below. Note these IP cores can only be targeted at RFSoC DFE devices.
Other radio IP cores from AMD like DPD, PC-CFR, and ORAN IP cores can also be targeted at RFSoC DFE devices. Existing licenses for these IP cores are also valid for RFSoC DFE.
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.