Physical Address Bit Leakage on AMD SEV-SNP Systems

Summary  

The researchers submitted to AMD a paper titled “A Close Look at RMP Entry Caching and Its Security Implications.”

Researchers reported a cache-based side-channel that could allow an unprivileged user process on AMD Secure Encrypted Virtualization with Secure Nested Paging (SEV-SNP) systems to leak up to six bits of physical address information. The researchers also noted that this leakage does not have an immediate security impact.

AMD has determined that the leakage results from Reverse Map Table (RMP) entries being cached in the L1D and L2 caches. Given that at most six physical address bits are exposed, AMD concurs with the researchers that this leakage does not have an immediate security impact.

Affected Products

AMD EPYC™ 3rd generation or later
AMD EPYC™ Embedded 3rd generation or later

Acknowledgement   

AMD thanks the following for reporting these issues and engaging in coordinated vulnerability disclosure.

  •  Alexis Bagia: Technische Universität Berlin
  • Vincent Ulitzsch: Technische Universität Berlin,  Massachusetts Institute of Technology (MIT)
  • Daniël Trujillo:  Massachusetts Institute of Technology (MIT)
  • Mengyuan Li: University of Southern California
  • Mengjia Yan:  Massachusetts Institute of Technology (MIT)Jean-Pierre Seifert: Technische Universität Berlin

Revisions

Revision Date Description
2025-10-20 Initial publication

DISCLAIMER

The information contained herein is for informational purposes only and is subject to change without notice. While every precaution has been taken in the preparation of this document, it may contain technical inaccuracies, omissions and typographical errors, and AMD is under no obligation to update or otherwise correct this information. Advanced Micro Devices, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this document, and assumes no liability of any kind, including the implied warranties of noninfringement, merchantability or fitness for particular purposes, with respect to the operation or use of AMD hardware, software or other products described herein. Any computer system has risks of security vulnerabilities that cannot be completely prevented or mitigated. No license, including implied or arising by estoppel, to any intellectual property rights is granted by this document. Terms and limitations applicable to the purchase or use of AMD’s products are as set forth in a signed agreement between the parties or in AMD's Standard Terms and Conditions of Sale.

AMD, the AMD Arrow logo, EPYC, and combinations thereof are trademarks of Advanced Micro Devices, Inc. CVE and the CVE logo are registered trademarks of The MITRE Corporation. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.

Third party content may be licensed to you directly by the third party that owns the content and is not licensed to you by AMD. ALL LINKED THIRD-PARTY CONTENT IS PROVIDED ‘AS IS’ WITHOUT A WARRANTY OF ANY KIND. USE OF SUCH THIRD-PARTY CONTENT IS DONE AT YOUR SOLE DISCRETION AND UNDER NO CIRCUMSTANCES WILL AMD BE LIABLE TO YOU FOR ANY THIRD PARTY CONTENT. YOU ASSUME ALL RISK AND ARE SOLELY RESPONSIBILITY FOR ANY DAMAGES THAT MAY ARISE FROM YOUR USE OF THIRD-PARTY CONTENT.

© 2025 Advanced Micro Devices, Inc. All rights reserved.