ASP non-Coherent Memory Access

Summary

Researchers shared with AMD a report titled “Undermining AMD SEV-SNP by Making the PSP Non-coherent.”

The authors report that a malicious hypervisor can undermine the integrity protections of AMD Secure Encrypted Virtualization – Secure Nested Paging (SEV-SNP) by forcing the AMD Security Processor (ASP) to operate without cache coherency with system memory. According to their paper, a hypervisor-controlled system setting allows reconfiguration of how the ASP’s memory requests interact with the CPU caches. By turning off coherency, the ASP may read stale data from DRAM when copying pages and updating associated metadata, causing recent in-CPU-cache updates from the guest to be lost. This could potentially undermine SEV-SNP’s guest integrity guarantees and allow data corruption.

Analysis by AMD is that this issue impacts 4^th and 5^th generation EPYC platforms.  Successful exploitation requires a malicious or compromised hypervisor with the ability to change the relevant system setting and to trigger ASP-managed memory operations. In addition, practical exploitation depends on a race condition, requiring precise timing to impact guest integrity.

Acknowledgement 

AMD thanks Benedict Schlüter and Shweta Shinde of ETH Zurich for reporting this issue and engaging in coordinated vulnerability disclosure.

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