Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
by: AMD
This IP is a 32-bit slave peripheral with an AXI4-Lite interface which provides the controller interface for the XADC hard macro on the Virtex™ 7, Kintex™ 7 families.
AXI XADC IP provides the controller interface for System Monitor XADC hard macro on the Virtex™ 7, Kintex™ 7, Artix™ 7 FPGA families and Zynq™ 7000 devices. This IP is a 32-bit slave peripheral with an AXI4-Lite interface which provides the controller interface for the XADC hard macro on the Virtex 7, Kintex 7, Artix 7 FPGA families and Zynq 7000 devices. It supports on-chip monitoring of supply voltages and temperature. This IP supports one dedicated high bandwidth differential analog-input pair and 16 auxiliary low bandwidth differential analog-input pairs.
LogiCORE™ | Version | AXI4 Support | Software Support | Supported Device Families |
---|---|---|---|---|
AXI XADC | v2.0 | AXI4-Lite | Vivado™ 2013.1 | Zynq™ 000 Artix™ 7 Kintex™ 7 Virtex™ 7 |
AXI XADC | v1.00a | AXI4-Lite | EDK™ 14.3 | Zynq 7000 Artix 7 Kintex 7 Virtex 7 |
Download the required software from the AMD Downloads page. For information on New Features, Known Issues, and Patches please refer to the Licensing Solution Center.
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.