Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
by: AMD
The LogiCORE™ IP 25 Gigabit Ethernet solution provides a 25 Gb/s Ethernet MAC and integrated PCS/PMA in BASE-R/KR modes.
The LogiCORE™ IP 10G/25G Ethernet solution provides a 10 Gigabit or 25 Gigabit per second (Gbps) Ethernet Media Access Controller integrated with a PCS/PMA in BASE-R/KR modes or a standalone PCS/PMA in BASE-R/KR modes. The core is designed to work with the latest UltraScale™ and UltraScale+™ FPGAs.
The 25G Ethernet IP is designed to the new 25 Gb/s Ethernet Consortium standard and supports the demand of cloud data centers to enable lower cost and increased performance solutions between the server and the top of rack switch and to increase the front panel density by two.
The evaluate button above licenses the 10G/25G Ethernet MAC + PCS option. If you also require to use FEC, Auto-Negotiation (AN) and/or Link Training (LT), please add this evaluation key below. (See the Order tab for more details)
The AMD 10G/25G Ethernet MAC/PCS is provided in netlist form to licensed Ethernet customers only. The netlist is configured based upon user provided details. As described in the ordering information below, a confirmation email which includes configuration details will be sent to you.
The sole purpose of the Ethernet cores is to help you develop designs for AMD devices. AMD reserves the right to deny access to the Ethernet core products. The Ethernet cores are licensed under the Core License Agreement.
To purchase any of these IP cores, contact your local Sales Representative referencing the appropriate part number(s) in below table.
| Description | License Key | Part Number |
| 10G/25G Ethernet MAC + BASE-R (64-bit or 32-bit) 1G/10G/25G Switching Ethernet Subsystem |
xxv_eth_mac_pcs |
EF-DI-25GEMAC-PROJ* EF-DI-25GEMAC-SITE* |
| Standalone 10G Ethernet MAC (64-bit) | x_eth_mac | |
| 25GBASE-KR (clause 108 RS-FEC, clause 74 FEC, AN) 10GBASE-KR (clause 74 FEC, AN) |
xxv_eth_basekr ieee802d3_25g_rs_fec_full ieee802d3_25g_rs_fec_full_only*** |
EF-DI-25GBASE-KR-PROJ** EF-DI-25GBASE-KR-SITE** |
| 25GBASE-R 10GBASE-R |
No key | Bundled with Vivado. No part number |
|
xxv_tsn_802d1cm xxv_eth_mac_pcs x_eth_mac |
EF-DI-25G-TSN-802-1-CM-PROJ Note: Bundle includes Ethernet MAC IP. |
*Includes access to 10 Gigabit Ethernet Media Access Controller - 10GEMAC which is recommended for existing UltraScale and 7 Series designs. For new UltraScale and UltraScale+ designs, please refer to the 10G/25G Ethernet Subsystem. **Includes access to 10 Gigabit Ethernet PCS/PMA with FEC/Auto-Negotiation - 10GBASE-KR ***Enables transcode bypass mode. For more information, refer to the 25G RS-FEC Product Guide. To request access email ethernet_mgmt@amd.com |
||
As part of the notification for the Ethernet configuration, you will be asked to accept the Core Project License Agreement. The email address associated with your amd.com account must be a valid company email address in order for the netlist to be approved.
Hardware Evaluation Time Out Period * : ~ 8 hrs
| LogiCORE™ | Version | Support | Software Support | Supported Device Families |
|---|---|---|---|---|
| 10G/25G Ethernet Subsystem (25GEMAC / 25GBASE-KR) |
v4.1 | AXI4 XGMII or XXVGMII |
Vivado™ 2023.1 | Versal™ Adaptive SoC Kintex™ UltraScale+™ Virtex™ UltraScale+™ Zynq™ UltraScale+™ MPSoC Zynq UltraScale+ RFSoC Kintex UltraScale™ Virtex UltraScale™ |
Download the required software from the AMD Downloads page. For information on New Features, Known Issues, and Patches please refer to the Licensing Solution Center.
* A Hardware Evaluation license for any of the IP cores above will enable you to parameterize, generate and instantiate these cores in your design. You will also be able to perform functional and timing simulation and generate a bitstream that you can use to download and configure your design in hardware.
The IP cores in this table will be fully functional in the programmed device for certain amount of time. After this time, the IP will "time out" (cease to function) and you will need to download and configure the FPGA again.
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.